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[ARM GlobalISel] Cleanup CallLowering a bit 

We never actually use the Offsets produced by ComputeValueVTs, so remove
them until we need them.

llvm-svn: 361755
This commit is contained in:
Diana Picus 2019-05-27 10:30:33 +00:00
parent 519ef6afdf
commit 68b20c589c
2 changed files with 13 additions and 22 deletions
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33
llvm/lib/Target/ARM/ARMCallLowering.cpp
View File

@ -192,8 +192,7 @@ void ARMCallLowering::splitToValueTypes(
const Function &F = MF.getFunction(); const Function &F = MF.getFunction();
SmallVector<EVT, 4> SplitVTs; SmallVector<EVT, 4> SplitVTs;
SmallVector<uint64_t, 4> Offsets; ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs, nullptr, nullptr, 0);
ComputeValueVTs(TLI, DL, OrigArg.Ty, SplitVTs, &Offsets, 0);
if (SplitVTs.size() == 1) { if (SplitVTs.size() == 1) {
// Even if there is no splitting to do, we still want to replace the // Even if there is no splitting to do, we still want to replace the
@ -206,7 +205,6 @@ void ARMCallLowering::splitToValueTypes(
return; return;
} }
unsigned FirstRegIdx = SplitArgs.size();
for (unsigned i = 0, e = SplitVTs.size(); i != e; ++i) { for (unsigned i = 0, e = SplitVTs.size(); i != e; ++i) {
EVT SplitVT = SplitVTs[i]; EVT SplitVT = SplitVTs[i];
Type *SplitTy = SplitVT.getTypeForEVT(Ctx); Type *SplitTy = SplitVT.getTypeForEVT(Ctx);
@ -224,13 +222,11 @@ void ARMCallLowering::splitToValueTypes(
Flags.setInConsecutiveRegsLast(); Flags.setInConsecutiveRegsLast();
} }
SplitArgs.push_back( unsigned PartReg =
ArgInfo{MRI.createGenericVirtualRegister(getLLTForType(*SplitTy, DL)), MRI.createGenericVirtualRegister(getLLTForType(*SplitTy, DL));
SplitTy, Flags, OrigArg.IsFixed}); SplitArgs.push_back(ArgInfo{PartReg, SplitTy, Flags, OrigArg.IsFixed});
PerformArgSplit(PartReg);
} }
for (unsigned i = 0; i < Offsets.size(); ++i)
PerformArgSplit(SplitArgs[FirstRegIdx + i].Reg, Offsets[i] * 8);
} }
/// Lower the return value for the already existing \p Ret. This assumes that /// Lower the return value for the already existing \p Ret. This assumes that
@ -262,9 +258,8 @@ bool ARMCallLowering::lowerReturnVal(MachineIRBuilder &MIRBuilder,
setArgFlags(CurArgInfo, AttributeList::ReturnIndex, DL, F); setArgFlags(CurArgInfo, AttributeList::ReturnIndex, DL, F);
SmallVector<unsigned, 4> Regs; SmallVector<unsigned, 4> Regs;
splitToValueTypes( splitToValueTypes(CurArgInfo, SplitVTs, MF,
CurArgInfo, SplitVTs, MF, [&](unsigned Reg) { Regs.push_back(Reg); });
[&](unsigned Reg, uint64_t Offset) { Regs.push_back(Reg); });
if (Regs.size() > 1) if (Regs.size() > 1)
MIRBuilder.buildUnmerge(Regs, VRegs[i]); MIRBuilder.buildUnmerge(Regs, VRegs[i]);
} }
@ -466,9 +461,8 @@ bool ARMCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
SplitRegs.clear(); SplitRegs.clear();
splitToValueTypes(AInfo, ArgInfos, MF, [&](unsigned Reg, uint64_t Offset) { splitToValueTypes(AInfo, ArgInfos, MF,
SplitRegs.push_back(Reg); [&](unsigned Reg) { SplitRegs.push_back(Reg); });
});
if (!SplitRegs.empty()) if (!SplitRegs.empty())
MIRBuilder.buildMerge(VRegs[Idx], SplitRegs); MIRBuilder.buildMerge(VRegs[Idx], SplitRegs);
@ -575,9 +569,8 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
return false; return false;
SmallVector<unsigned, 8> Regs; SmallVector<unsigned, 8> Regs;
splitToValueTypes(Arg, ArgInfos, MF, [&](unsigned Reg, uint64_t Offset) { splitToValueTypes(Arg, ArgInfos, MF,
Regs.push_back(Reg); [&](unsigned Reg) { Regs.push_back(Reg); });
});
if (Regs.size() > 1) if (Regs.size() > 1)
MIRBuilder.buildUnmerge(Regs, Arg.Reg); MIRBuilder.buildUnmerge(Regs, Arg.Reg);
@ -598,9 +591,7 @@ bool ARMCallLowering::lowerCall(MachineIRBuilder &MIRBuilder,
ArgInfos.clear(); ArgInfos.clear();
SmallVector<unsigned, 8> SplitRegs; SmallVector<unsigned, 8> SplitRegs;
splitToValueTypes(OrigRet, ArgInfos, MF, splitToValueTypes(OrigRet, ArgInfos, MF,
[&](unsigned Reg, uint64_t Offset) { [&](unsigned Reg) { SplitRegs.push_back(Reg); });
SplitRegs.push_back(Reg);
});
auto RetAssignFn = TLI.CCAssignFnForReturn(CallConv, IsVarArg); auto RetAssignFn = TLI.CCAssignFnForReturn(CallConv, IsVarArg);
CallReturnHandler RetHandler(MIRBuilder, MRI, MIB, RetAssignFn); CallReturnHandler RetHandler(MIRBuilder, MRI, MIB, RetAssignFn);

2
llvm/lib/Target/ARM/ARMCallLowering.h
View File

@ -47,7 +47,7 @@ private:
ArrayRef<unsigned> VRegs, ArrayRef<unsigned> VRegs,
MachineInstrBuilder &Ret) const; MachineInstrBuilder &Ret) const;
using SplitArgTy = std::function<void(unsigned Reg, uint64_t Offset)>; using SplitArgTy = std::function<void(unsigned Reg)>;
/// Split an argument into one or more arguments that the CC lowering can cope /// Split an argument into one or more arguments that the CC lowering can cope
/// with (e.g. replace pointers with integers). /// with (e.g. replace pointers with integers).