forked from OSchip/llvm-project
[NFC][mlgo] Add feature declarations for the ML regalloc advisor
This just adds feature declarations and some boilerplate. Differential Revision: https://reviews.llvm.org/D116076
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@ -41,6 +41,11 @@ public:
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getTensorUntyped(static_cast<size_t>(FeatureID)));
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getTensorUntyped(static_cast<size_t>(FeatureID)));
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}
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}
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virtual void *getTensorUntyped(size_t Index) = 0;
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const void *getTensorUntyped(size_t Index) const {
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return (const_cast<MLModelRunner *>(this))->getTensorUntyped(Index);
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}
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enum class Kind : int { Unknown, Release, Development, NoOp };
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enum class Kind : int { Unknown, Release, Development, NoOp };
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Kind getKind() const { return Type; }
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Kind getKind() const { return Type; }
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@ -49,10 +54,6 @@ protected:
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assert(Type != Kind::Unknown);
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assert(Type != Kind::Unknown);
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}
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}
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virtual void *evaluateUntyped() = 0;
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virtual void *evaluateUntyped() = 0;
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virtual void *getTensorUntyped(size_t Index) = 0;
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const void *getTensorUntyped(size_t Index) const {
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return (const_cast<MLModelRunner *>(this))->getTensorUntyped(Index);
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}
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LLVMContext &Ctx;
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LLVMContext &Ctx;
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const Kind Type;
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const Kind Type;
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@ -113,6 +113,7 @@ add_llvm_component_library(LLVMCodeGen
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MIRFSDiscriminator.cpp
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MIRFSDiscriminator.cpp
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MIRSampleProfile.cpp
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MIRSampleProfile.cpp
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MIRYamlMapping.cpp
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MIRYamlMapping.cpp
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MLRegallocEvictAdvisor.cpp
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ModuloSchedule.cpp
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ModuloSchedule.cpp
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MultiHazardRecognizer.cpp
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MultiHazardRecognizer.cpp
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PatchableFunction.cpp
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PatchableFunction.cpp
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@ -0,0 +1,173 @@
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//===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Implementation of the ML eviction advisor and reward injection pass
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Config/config.h"
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#if defined(LLVM_HAVE_TF_AOT) || defined(LLVM_HAVE_TF_API)
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#include "RegAllocEvictionAdvisor.h"
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#include "llvm/Analysis/MLModelRunner.h"
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#include "llvm/Analysis/ModelUnderTrainingRunner.h"
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#include "llvm/Analysis/NoInferenceModelRunner.h"
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#include "llvm/Analysis/Utils/TFUtils.h"
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#include "llvm/CodeGen/CalcSpillWeights.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/RegisterClassInfo.h"
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#include "llvm/CodeGen/VirtRegMap.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/PassRegistry.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetMachine.h"
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#include <memory>
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using namespace llvm;
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#define DEBUG_TYPE "ml-regalloc"
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namespace {
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// This is the maximum number of interfererring ranges. That's the number of
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// distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize.
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// For X86, that's 32.
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// TODO: find a way to get this, statically, in a programmatic way.
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static const int64_t MaxInterferences = 32;
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// Logically, we can think of the feature set given to the evaluator as a 2D
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// matrix. The rows are the features (see next). The columns correspond to the
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// interferences. We treat the candidate virt reg as an 'interference', too, as
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// its feature set is the same as that of the interferring ranges. So we'll have
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// MaxInterferences + 1 columns and by convention, we will use the last column
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// for the virt reg seeking allocation.
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static const int64_t CandidateVirtRegPos = MaxInterferences;
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static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1;
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// Most features are as described above, so we'll reuse this vector in defining
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// them.
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static const std::vector<int64_t> PerLiveRangeShape{1, NumberOfInterferences};
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// --------------
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// Features table
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// --------------
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// For each interfering live range (incl. the candidate) we collect a number of
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// features. However, because the features are of different types (and because
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// of ML best practices), we organize the tensors per feature, not per
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// candidate. Each such tensor has a scalar value corresponding to the
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// interferring live range at that position, in the order in AllocationOrder.
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// The last position corresponds to the virt reg seeking allocation.
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// Exception to all that is the progression feature, which is just a scalar (see
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// its documentation for details).
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// Note on naming: the "_by_max" are normalized using the largest value of that
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// tensor, as observed in the current decision making stage (i.e. for the
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// current call to the advisor's tryFindEvictionCandidate)
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//
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// The feature list format: type, name, shape, documentation.
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// Note: we can really just use int64 and float, hence the modeling of some
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// bools as int64 values.
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#define RA_EVICT_FEATURES_LIST(M) \
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M(int64_t, mask, PerLiveRangeShape, \
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"boolean values, 0 for unavailable candidates (i.e. if a position is 0, " \
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"it " \
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"can't be evicted)") \
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M(int64_t, is_free, PerLiveRangeShape, \
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"boolean values, 1 if this phys reg is actually free (no interferences)") \
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M(float, nr_urgent, PerLiveRangeShape, \
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"number of 'urgent' intervals, normalized. Urgent are those that are OK " \
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"to break cascades") \
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M(float, nr_broken_hints, PerLiveRangeShape, \
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"if this position were evicted, how many broken hints would there be") \
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M(int64_t, is_hint, PerLiveRangeShape, \
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"is this a preferred phys reg for the candidate") \
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M(int64_t, is_local, PerLiveRangeShape, \
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"is this live range local to a basic block") \
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M(float, nr_rematerializable, PerLiveRangeShape, \
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"nr rematerializable ranges") \
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M(float, nr_defs_and_uses, PerLiveRangeShape, \
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"bb freq - weighed nr defs and uses") \
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M(float, weighed_reads_by_max, PerLiveRangeShape, \
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"bb freq - weighed nr of reads, normalized") \
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M(float, weighed_writes_by_max, PerLiveRangeShape, \
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"bb feq - weighed nr of writes, normalized") \
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M(float, weighed_read_writes_by_max, PerLiveRangeShape, \
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"bb freq - weighed nr of uses that are both read and writes, normalized") \
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M(float, weighed_indvars_by_max, PerLiveRangeShape, \
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"bb freq - weighed nr of uses that are indvars, normalized") \
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M(float, hint_weights_by_max, PerLiveRangeShape, \
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"bb freq - weighed nr of uses that are hints, normalized") \
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M(float, start_bb_freq_by_max, PerLiveRangeShape, \
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"the freq in the start block, normalized") \
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M(float, end_bb_freq_by_max, PerLiveRangeShape, \
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"freq of end block, normalized") \
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M(float, hottest_bb_freq_by_max, PerLiveRangeShape, \
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"hottest BB freq, normalized") \
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M(float, liverange_size, PerLiveRangeShape, \
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"size (instr index diff) of the LR") \
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M(float, use_def_density, PerLiveRangeShape, \
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"the max weight, as computed by the manual heuristic") \
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M(int64_t, max_stage, PerLiveRangeShape, \
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"largest stage of an interval in this LR") \
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M(int64_t, min_stage, PerLiveRangeShape, \
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"lowest stage of an interval in this LR") \
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M(float, progress, {1}, "ratio of current queue size to initial size")
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// The model learns to pick one of the mask == 1 interferences. This is the name
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// of the output tensor.
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// The contract with the model is that the output will be guaranteed to be to a
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// mask == 1 position.
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const char *const DecisionName = "index_to_evict";
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// Named features index.
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enum FeatureIDs {
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#define _FEATURE_IDX(_, name, __, ___) name,
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RA_EVICT_FEATURES_LIST(_FEATURE_IDX)
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#undef _FEATURE_IDX
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FeatureCount
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};
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// The ML advisor will typically have a sparse input to the evaluator, because
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// various phys regs won't be available. It's easier (maintenance-wise) to
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// bulk-reset the state of the evaluator each time we are about to use it again.
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template <typename T> size_t getTotalSize(const std::vector<int64_t> &Shape) {
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size_t Ret = sizeof(T);
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for (const auto V : Shape)
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Ret *= V;
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return Ret;
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}
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void resetInputs(MLModelRunner &Runner) {
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#define _RESET(TYPE, NAME, SHAPE, __) \
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std::memset(Runner.getTensorUntyped(FeatureIDs::NAME), 0, \
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getTotalSize<TYPE>(SHAPE));
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RA_EVICT_FEATURES_LIST(_RESET)
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#undef _RESET
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}
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// Development mode-specifics
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#ifdef LLVM_HAVE_TF_API
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#define _DECL_FEATURES(type, name, shape, _) \
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TensorSpec::createSpec<type>(#name, shape),
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static const std::vector<TensorSpec> InputFeatures{
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{RA_EVICT_FEATURES_LIST(_DECL_FEATURES)}};
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#undef _DECL_FEATURES
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static const TensorSpec Output =
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TensorSpec::createSpec<int64_t>(DecisionName, {1});
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const char *const RewardName = "reward";
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static const TensorSpec Reward =
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TensorSpec::createSpec<int64_t>(RewardName, {1});
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#endif //#ifdef LLVM_HAVE_TF_API
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} // namespace
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#endif // defined(LLVM_HAVE_TF_AOT) || defined(LLVM_HAVE_TF_API)
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