forked from OSchip/llvm-project
Enable aligned NEON spilling by default.
Experiments show this to be a small speedup for modern ARM cores. llvm-svn: 147689
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@ -28,7 +28,7 @@
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using namespace llvm;
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using namespace llvm;
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cl::opt<bool>
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cl::opt<bool>
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SpillAlignedNEONRegs("align-neon-spills", cl::Hidden,
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SpillAlignedNEONRegs("align-neon-spills", cl::Hidden, cl::init(true),
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cl::desc("Align ARM NEON spills in prolog and epilog"));
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cl::desc("Align ARM NEON spills in prolog and epilog"));
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static MachineBasicBlock::iterator
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static MachineBasicBlock::iterator
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@ -11,7 +11,7 @@ declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly
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define void @aaa(%quuz* %this, i8* %block) {
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define void @aaa(%quuz* %this, i8* %block) {
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; CHECK: aaa:
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; CHECK: aaa:
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; CHECK: bic sp, sp, #15
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; CHECK: bic {{.*}}, #15
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; CHECK: vst1.64 {{.*}}sp, :128
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; CHECK: vst1.64 {{.*}}sp, :128
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; CHECK: vld1.64 {{.*}}sp, :128
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; CHECK: vld1.64 {{.*}}sp, :128
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entry:
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entry:
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@ -1,5 +1,5 @@
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; RUN: llc < %s -mcpu=cortex-a8 | FileCheck %s
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; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills=0 | FileCheck %s
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; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills | FileCheck %s --check-prefix=NEON
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; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills=1 | FileCheck %s --check-prefix=NEON
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios"
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target triple = "thumbv7-apple-ios"
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