forked from OSchip/llvm-project
[NFC] TLI query with default(on) behavior wrt DAG combines for fmin/fmax target control
llvm-svn: 352396
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@ -1762,6 +1762,8 @@ public:
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Action != TypeSplitVector;
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}
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virtual bool isProfitableToCombineMinNumMaxNum(EVT VT) const { return true; }
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/// Return true if a select of constants (select Cond, C1, C2) should be
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/// transformed into simple math ops with the condition value. For example:
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/// select Cond, C1, C1-1 --> add (zext Cond), C1-1
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@ -7206,11 +7206,14 @@ SDValue DAGCombiner::visitCTPOP(SDNode *N) {
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// FIXME: This should be checking for no signed zeros on individual operands, as
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// well as no nans.
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static bool isLegalToCombineMinNumMaxNum(SelectionDAG &DAG, SDValue LHS, SDValue RHS) {
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static bool isLegalToCombineMinNumMaxNum(SelectionDAG &DAG, SDValue LHS,
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SDValue RHS,
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const TargetLowering &TLI) {
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const TargetOptions &Options = DAG.getTarget().Options;
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EVT VT = LHS.getValueType();
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return Options.NoSignedZerosFPMath && VT.isFloatingPoint() &&
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TLI.isProfitableToCombineMinNumMaxNum(VT) &&
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DAG.isKnownNeverNaN(LHS) && DAG.isKnownNeverNaN(RHS);
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}
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@ -7480,7 +7483,7 @@ SDValue DAGCombiner::visitSELECT(SDNode *N) {
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// select (fcmp gt x, y), x, y -> fmaxnum x, y
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//
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// This is OK if we don't care what happens if either operand is a NaN.
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if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(DAG, N1, N2))
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if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(DAG, N1, N2, TLI))
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if (SDValue FMinMax = combineMinNumMaxNum(DL, VT, Cond0, Cond1, N1, N2,
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CC, TLI, DAG))
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return FMinMax;
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@ -7987,7 +7990,8 @@ SDValue DAGCombiner::visitVSELECT(SDNode *N) {
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// NaN.
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//
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EVT VT = N->getValueType(0);
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if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(DAG, N0.getOperand(0), N0.getOperand(1))) {
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if (N0.hasOneUse() && isLegalToCombineMinNumMaxNum(
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DAG, N0.getOperand(0), N0.getOperand(1), TLI)) {
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ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
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if (SDValue FMinMax = combineMinNumMaxNum(
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DL, VT, N0.getOperand(0), N0.getOperand(1), N1, N2, CC, TLI, DAG))
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