forked from OSchip/llvm-project
Revert 4334892e7b
"[DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node."
This broke various Windows builds, see comments on the Phabricator
review.
This also reverts the follow-up 20bf0cf
.
> Summary:
> This fold, helps recover from the rest of the D62266 ARM regressions.
> https://rise4fun.com/Alive/TvpC
>
> Note that while the fold is quite flexible, i've restricted it
> to the single interesting pattern at the moment.
>
> Reviewers: efriedma, craig.topper, spatel, RKSimon, deadalnix
>
> Reviewed By: deadalnix
>
> Subscribers: javed.absar, kristof.beyls, llvm-commits
>
> Tags: #llvm
>
> Differential Revision: https://reviews.llvm.org/D62450
This commit is contained in:
parent
d01fd2f35a
commit
684ebc605e
llvm
include/llvm/CodeGen
lib/CodeGen/SelectionDAG
test/CodeGen
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@ -4268,13 +4268,6 @@ private:
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SDValue buildSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode,
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ISD::CondCode Cond, DAGCombinerInfo &DCI,
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const SDLoc &DL) const;
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/// x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node.
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SDValue optimizeSetCCToComparisonWithZero(EVT SCCVT, SDValue N0,
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ConstantSDNode *N1C,
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ISD::CondCode Cond,
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DAGCombinerInfo &DCI,
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const SDLoc &DL) const;
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};
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/// Given an LLVM IR type and return type attributes, compute the return value
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@ -3045,66 +3045,6 @@ SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1,
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return DAG.getSetCC(DL, VT, X, YShl1, Cond);
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}
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/// x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node.
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SDValue TargetLowering::optimizeSetCCToComparisonWithZero(
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EVT SCCVT, SDValue N0, ConstantSDNode *N1C, ISD::CondCode Cond,
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DAGCombinerInfo &DCI, const SDLoc &DL) const {
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assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
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"Only for equality-comparisons.");
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// The constant we are comparing with must be a non-zero, non-opaque constant.
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if (N1C->isNullValue() || N1C->isOpaque())
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return SDValue();
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// LHS should not be used elsewhere, to avoid creating an extra node.
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if (!N0.hasOneUse())
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return SDValue();
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// Will we able to fold the '-c' into 'x' node?
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bool IsAdd;
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switch (N0.getOpcode()) {
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default:
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return SDValue(); // Don't know about that node.
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case ISD::ADD:
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case ISD::SUB:
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return SDValue(); // Let's not touch these.
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case ISD::ADDCARRY:
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IsAdd = true;
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break;
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case ISD::SUBCARRY:
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IsAdd = false;
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break;
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}
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// Second operand must be a non-opaque constant.
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ConstantSDNode *N01C = isConstOrConstSplat(N0.getOperand(1));
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if (!N01C || N01C->isOpaque())
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return SDValue();
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// And let's be even more specific for now, it must be a zero constant.
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// It is possible to relax this requirement, but a precise cost-model needed.
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if (!N01C->isNullValue())
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return SDValue();
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SelectionDAG &DAG = DCI.DAG;
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EVT OpVT = N0.getValueType();
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// (y + N01C) - N1C = y + (N01C - N1C)
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// (y - N01C) - N1C = y - (N01C + N1C)
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SDValue NewC = DAG.FoldConstantArithmetic(IsAdd ? ISD::SUB : ISD::ADD, DL,
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OpVT, N01C, N1C);
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assert(NewC && "Constant-folding failed!");
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SmallVector<SDValue, 3> N0Ops(N0.getNode()->ops().begin(),
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N0.getNode()->ops().end());
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N0Ops[1] = NewC;
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N0 = DAG.getNode(N0.getOpcode(), DL, N0->getVTList(), N0Ops);
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SDValue Zero = DAG.getConstant(0, DL, OpVT);
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return DAG.getSetCC(DL, SCCVT, N0, Zero, Cond);
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}
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/// Try to simplify a setcc built with the specified operands and cc. If it is
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/// unable to simplify it, return a null SDValue.
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SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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@ -3638,11 +3578,6 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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return CC;
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}
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if (Cond == ISD::SETEQ || Cond == ISD::SETNE)
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if (SDValue CC =
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optimizeSetCCToComparisonWithZero(VT, N0, N1C, Cond, DCI, dl))
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return CC;
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// If we have "setcc X, C0", check to see if we can shrink the immediate
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// by changing cc.
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// TODO: Support this for vectors after legalize ops.
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@ -14,35 +14,61 @@ define void @fn1(i32 %a, i32 %b, i32 %c) local_unnamed_addr #0 {
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; ARM-NEXT: adds r0, r1, r0
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; ARM-NEXT: movw r1, #65535
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; ARM-NEXT: sxth r2, r2
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; ARM-NEXT: adc r0, r2, #1
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; ARM-NEXT: tst r0, r1
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; ARM-NEXT: adc r0, r2, #0
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; ARM-NEXT: uxth r0, r0
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; ARM-NEXT: cmp r0, r1
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; ARM-NEXT: bxeq lr
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; ARM-NEXT: .LBB0_1: @ %for.cond
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; ARM-NEXT: @ =>This Inner Loop Header: Depth=1
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; ARM-NEXT: b .LBB0_1
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;
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; THUMB1-LABEL: fn1:
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; THUMB1: @ %bb.0: @ %entry
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; THUMB1-NEXT: rsbs r2, r2, #0
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; THUMB1-NEXT: sxth r2, r2
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; THUMB1-NEXT: movs r3, #1
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; THUMB1-NEXT: adds r0, r1, r0
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; THUMB1-NEXT: adcs r3, r2
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; THUMB1-NEXT: lsls r0, r3, #16
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; THUMB1-NEXT: beq .LBB0_2
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; THUMB1-NEXT: .LBB0_1: @ %for.cond
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; THUMB1-NEXT: @ =>This Inner Loop Header: Depth=1
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; THUMB1-NEXT: b .LBB0_1
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; THUMB1-NEXT: .LBB0_2: @ %if.end
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; THUMB1-NEXT: bx lr
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; THUMBV6M-LABEL: fn1:
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; THUMBV6M: @ %bb.0: @ %entry
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; THUMBV6M-NEXT: rsbs r2, r2, #0
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; THUMBV6M-NEXT: sxth r2, r2
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; THUMBV6M-NEXT: movs r3, #0
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; THUMBV6M-NEXT: adds r0, r1, r0
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; THUMBV6M-NEXT: adcs r3, r2
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; THUMBV6M-NEXT: uxth r0, r3
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; THUMBV6M-NEXT: ldr r1, .LCPI0_0
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; THUMBV6M-NEXT: cmp r0, r1
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; THUMBV6M-NEXT: beq .LBB0_2
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; THUMBV6M-NEXT: .LBB0_1: @ %for.cond
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; THUMBV6M-NEXT: @ =>This Inner Loop Header: Depth=1
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; THUMBV6M-NEXT: b .LBB0_1
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; THUMBV6M-NEXT: .LBB0_2: @ %if.end
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; THUMBV6M-NEXT: bx lr
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; THUMBV6M-NEXT: .p2align 2
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; THUMBV6M-NEXT: @ %bb.3:
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; THUMBV6M-NEXT: .LCPI0_0:
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; THUMBV6M-NEXT: .long 65535 @ 0xffff
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;
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; THUMBV8M-BASE-LABEL: fn1:
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; THUMBV8M-BASE: @ %bb.0: @ %entry
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; THUMBV8M-BASE-NEXT: rsbs r2, r2, #0
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; THUMBV8M-BASE-NEXT: sxth r2, r2
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; THUMBV8M-BASE-NEXT: movs r3, #0
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; THUMBV8M-BASE-NEXT: adds r0, r1, r0
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; THUMBV8M-BASE-NEXT: adcs r3, r2
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; THUMBV8M-BASE-NEXT: uxth r0, r3
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; THUMBV8M-BASE-NEXT: movw r1, #65535
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; THUMBV8M-BASE-NEXT: cmp r0, r1
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; THUMBV8M-BASE-NEXT: beq .LBB0_2
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; THUMBV8M-BASE-NEXT: .LBB0_1: @ %for.cond
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; THUMBV8M-BASE-NEXT: @ =>This Inner Loop Header: Depth=1
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; THUMBV8M-BASE-NEXT: b .LBB0_1
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; THUMBV8M-BASE-NEXT: .LBB0_2: @ %if.end
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; THUMBV8M-BASE-NEXT: bx lr
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;
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; THUMB-LABEL: fn1:
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; THUMB: @ %bb.0: @ %entry
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; THUMB-NEXT: rsbs r2, r2, #0
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; THUMB-NEXT: adds r0, r0, r1
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; THUMB-NEXT: movw r1, #65535
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; THUMB-NEXT: sxth r2, r2
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; THUMB-NEXT: adc r0, r2, #1
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; THUMB-NEXT: lsls r0, r0, #16
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; THUMB-NEXT: adc r0, r2, #0
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; THUMB-NEXT: uxth r0, r0
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; THUMB-NEXT: cmp r0, r1
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; THUMB-NEXT: it eq
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; THUMB-NEXT: bxeq lr
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; THUMB-NEXT: .LBB0_1: @ %for.cond
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@ -1,54 +0,0 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i686-w64-windows-gnu %s -o - | FileCheck %s
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; Reduced from https://bugs.llvm.org/show_bug.cgi?id=43769
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define i32 @b(i32 %a, i32* %c, i32 %d) {
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; CHECK-LABEL: b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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; CHECK-NEXT: je LBB0_4
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; CHECK-NEXT: # %bb.1: # %for.body.lr.ph
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: sarl $31, %ecx
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; CHECK-NEXT: addl $-2147483647, %eax # imm = 0x80000001
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; CHECK-NEXT: adcl $0, %ecx
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; CHECK-NEXT: jne LBB0_4
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; CHECK-NEXT: # %bb.2: # %for.body.lr.ph.peel.newph
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl $-2147483647, %edx # imm = 0x80000001
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; CHECK-NEXT: movl %ecx, %eax
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; CHECK-NEXT: sarl $31, %eax
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; CHECK-NEXT: addl %ecx, %edx
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; CHECK-NEXT: adcl $0, %eax
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB0_3: # %for.body
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: je LBB0_3
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; CHECK-NEXT: LBB0_4: # %for.end
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; CHECK-NEXT: retl
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entry:
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%tobool3 = icmp eq i32 %a, 0
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br i1 %tobool3, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%0 = ptrtoint i32* %c to i32
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%conv.peel = sext i32 %d to i64
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%add.peel = add nsw i64 %conv.peel, 2147483649
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%tobool1.peel = icmp ugt i64 %add.peel, 4294967295
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br i1 %tobool1.peel, label %for.end, label %for.body.lr.ph.peel.newph
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for.body.lr.ph.peel.newph: ; preds = %for.body.lr.ph
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%conv = sext i32 %0 to i64
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%add = add nsw i64 %conv, 2147483649
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%tobool1 = icmp ugt i64 %add, 4294967295
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph.peel.newph
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br i1 %tobool1, label %for.end, label %for.body
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for.end: ; preds = %for.body.lr.ph, %for.body, %entry
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ret i32 undef
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}
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