forked from OSchip/llvm-project
[X86] Add missing isel pattern for BLCFILL producing flags.
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@ -2919,6 +2919,11 @@ let Predicates = [HasTBM] in {
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(TZMSK64rr GR64:$src)>;
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(TZMSK64rr GR64:$src)>;
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// Patterns to match flag producing ops.
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// Patterns to match flag producing ops.
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def : Pat<(and_flag_nocf GR32:$src, (add GR32:$src, 1)),
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(BLCFILL32rr GR32:$src)>;
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def : Pat<(and_flag_nocf GR64:$src, (add GR64:$src, 1)),
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(BLCFILL64rr GR64:$src)>;
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def : Pat<(or_flag_nocf GR32:$src, (not (add GR32:$src, 1))),
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def : Pat<(or_flag_nocf GR32:$src, (not (add GR32:$src, 1))),
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(BLCI32rr GR32:$src)>;
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(BLCI32rr GR32:$src)>;
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def : Pat<(or_flag_nocf GR64:$src, (not (add GR64:$src, 1))),
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def : Pat<(or_flag_nocf GR64:$src, (not (add GR64:$src, 1))),
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@ -964,4 +964,48 @@ define i64 @tzmsk64_branch(i64 %x) nounwind {
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ret i64 %tmp3
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ret i64 %tmp3
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}
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}
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define i32 @blcfill32_branch(i32 %x) nounwind {
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; CHECK-LABEL: blcfill32_branch:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: blcfilll %edi, %ebx
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; CHECK-NEXT: jne .LBB73_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: callq bar
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; CHECK-NEXT: .LBB73_2:
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; CHECK-NEXT: movl %ebx, %eax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%tmp2 = add i32 %x, 1
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%tmp3 = and i32 %tmp2, %x
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%cmp = icmp eq i32 %tmp3, 0
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br i1 %cmp, label %1, label %2
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tail call void @bar()
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br label %2
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ret i32 %tmp3
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}
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define i64 @blcfill64_branch(i64 %x) nounwind {
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; CHECK-LABEL: blcfill64_branch:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: blcfillq %rdi, %rbx
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; CHECK-NEXT: jne .LBB74_2
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; CHECK-NEXT: # %bb.1:
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; CHECK-NEXT: callq bar
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; CHECK-NEXT: .LBB74_2:
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; CHECK-NEXT: movq %rbx, %rax
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%tmp2 = add i64 %x, 1
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%tmp3 = and i64 %tmp2, %x
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%cmp = icmp eq i64 %tmp3, 0
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br i1 %cmp, label %1, label %2
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tail call void @bar()
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br label %2
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ret i64 %tmp3
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}
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declare void @bar()
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declare void @bar()
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