forked from OSchip/llvm-project
parent
595dc4c884
commit
677ee8390d
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@ -113,6 +113,22 @@ def ldr : InstARM<(ops IntRegs:$dst, memri:$addr),
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"ldr $dst, $addr",
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[(set IntRegs:$dst, (load iaddr:$addr))]>;
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def LDRB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
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"ldrb $dst, $addr",
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[(set IntRegs:$dst, (zextloadi8 IntRegs:$addr))]>;
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def LDRSB : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
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"ldrsb $dst, $addr",
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[(set IntRegs:$dst, (sextloadi8 IntRegs:$addr))]>;
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def LDRH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
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"ldrh $dst, $addr",
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[(set IntRegs:$dst, (zextloadi16 IntRegs:$addr))]>;
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def LDRSH : InstARM<(ops IntRegs:$dst, IntRegs:$addr),
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"ldrsh $dst, $addr",
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[(set IntRegs:$dst, (sextloadi16 IntRegs:$addr))]>;
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def str : InstARM<(ops IntRegs:$src, memri:$addr),
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"str $src, $addr",
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[(store IntRegs:$src, iaddr:$addr)]>;
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@ -51,3 +51,7 @@ Only needs 8 bytes of stack space. We currently allocate 16.
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should try to declare smull and umull as returning two values.
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----------------------------------------------------------
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Implement addressing modes 2 (ldrb) and 3 (ldrsb)
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----------------------------------------------------------
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@ -0,0 +1,33 @@
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; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm | grep ldrsb &&
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; RUN: llvm-as < %s | llc -march=arm | grep ldrb &&
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; RUN: llvm-as < %s | llc -march=arm | grep ldrsh &&
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; RUN: llvm-as < %s | llc -march=arm | grep ldrh
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int %f1(sbyte* %p) {
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entry:
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%tmp = load sbyte* %p ; <sbyte> [#uses=1]
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%tmp = cast sbyte %tmp to int ; <int> [#uses=1]
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ret int %tmp
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}
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int %f2(ubyte* %p) {
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entry:
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%tmp = load ubyte* %p ; <sbyte> [#uses=1]
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%tmp = cast ubyte %tmp to int ; <int> [#uses=1]
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ret int %tmp
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}
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int %f3(short* %p) {
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entry:
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%tmp = load short* %p ; <sbyte> [#uses=1]
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%tmp = cast short %tmp to int ; <int> [#uses=1]
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ret int %tmp
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}
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int %f4(ushort* %p) {
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entry:
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%tmp = load ushort* %p ; <sbyte> [#uses=1]
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%tmp = cast ushort %tmp to int ; <int> [#uses=1]
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ret int %tmp
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}
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