forked from OSchip/llvm-project
[ConstraintElimination] Add tests with signed predicates and ADDs.
This commit is contained in:
Florian Hahn
parent
16524d2f1b
commit
6778e2f441
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@ -0,0 +1,203 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
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define void @test.not.uge.ult(i8 %start, i8 %low, i8 %high) {
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; CHECK-LABEL: @test.not.uge.ult(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
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; CHECK-NEXT: [[C_1:%.*]] = icmp uge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
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; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: ret void
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; CHECK: if.end:
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; CHECK-NEXT: [[T_0:%.*]] = icmp ult i8 [[START]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_0]])
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; CHECK-NEXT: [[START_1:%.*]] = add nsw i8 [[START]], 1
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; CHECK-NEXT: [[T_1:%.*]] = icmp ult i8 [[START_1]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[START_2:%.*]] = add nsw i8 [[START]], 2
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; CHECK-NEXT: [[T_2:%.*]] = icmp ult i8 [[START_2]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_2]])
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; CHECK-NEXT: [[START_3:%.*]] = add nsw i8 [[START]], 3
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; CHECK-NEXT: [[T_3:%.*]] = icmp ult i8 [[START_3]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_3]])
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; CHECK-NEXT: [[START_4:%.*]] = add nsw i8 [[START]], 4
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; CHECK-NEXT: [[C_4:%.*]] = icmp ult i8 [[START_4]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[C_4]])
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; CHECK-NEXT: ret void
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;
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entry:
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%add.ptr.i = add nsw i8 %start, 3
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%c.1 = icmp uge i8 %add.ptr.i, %high
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br i1 %c.1, label %if.then, label %if.end
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if.then: ; preds = %entry
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ret void
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if.end: ; preds = %entry
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%t.0 = icmp ult i8 %start, %high
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call void @use(i1 %t.0)
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%start.1 = add nsw i8 %start, 1
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%t.1 = icmp ult i8 %start.1, %high
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call void @use(i1 %t.1)
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%start.2 = add nsw i8 %start, 2
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%t.2 = icmp ult i8 %start.2, %high
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call void @use(i1 %t.2)
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%start.3 = add nsw i8 %start, 3
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%t.3 = icmp ult i8 %start.3, %high
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call void @use(i1 %t.3)
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%start.4 = add nsw i8 %start, 4
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%c.4 = icmp ult i8 %start.4, %high
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call void @use(i1 %c.4)
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ret void
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}
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define void @test.not.sge.slt(i8 %start, i8 %low, i8 %high) {
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; CHECK-LABEL: @test.not.sge.slt(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
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; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
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; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: ret void
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; CHECK: if.end:
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; CHECK-NEXT: [[T_0:%.*]] = icmp slt i8 [[START]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_0]])
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; CHECK-NEXT: [[START_1:%.*]] = add nsw i8 [[START]], 1
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; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_1]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[START_2:%.*]] = add nsw i8 [[START]], 2
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; CHECK-NEXT: [[T_2:%.*]] = icmp slt i8 [[START_2]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_2]])
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; CHECK-NEXT: [[START_3:%.*]] = add nsw i8 [[START]], 3
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; CHECK-NEXT: [[T_3:%.*]] = icmp slt i8 [[START_3]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_3]])
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; CHECK-NEXT: [[START_4:%.*]] = add nsw i8 [[START]], 4
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; CHECK-NEXT: [[C_4:%.*]] = icmp slt i8 [[START_4]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[C_4]])
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; CHECK-NEXT: ret void
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;
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entry:
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%add.ptr.i = add nsw i8 %start, 3
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%c.1 = icmp sge i8 %add.ptr.i, %high
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br i1 %c.1, label %if.then, label %if.end
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if.then: ; preds = %entry
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ret void
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if.end: ; preds = %entry
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%t.0 = icmp slt i8 %start, %high
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call void @use(i1 %t.0)
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%start.1 = add nsw i8 %start, 1
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%t.1 = icmp slt i8 %start.1, %high
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call void @use(i1 %t.1)
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%start.2 = add nsw i8 %start, 2
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%t.2 = icmp slt i8 %start.2, %high
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call void @use(i1 %t.2)
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%start.3 = add nsw i8 %start, 3
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%t.3 = icmp slt i8 %start.3, %high
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call void @use(i1 %t.3)
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%start.4 = add nsw i8 %start, 4
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%c.4 = icmp slt i8 %start.4, %high
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call void @use(i1 %c.4)
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ret void
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}
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define void @test.decompose.nonconst(i8 %a, i8 %b, i8 %c, i8 %d) {
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; CHECK-LABEL: @test.decompose.nonconst(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[A:%.*]], [[C:%.*]]
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; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[B:%.*]], [[C]]
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; CHECK-NEXT: [[AND_0:%.*]] = and i1 [[C_0]], [[C_1]]
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; CHECK-NEXT: br i1 [[AND_0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[C_2:%.*]] = icmp sge i8 [[A]], 0
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; CHECK-NEXT: [[C_3:%.*]] = icmp sge i8 [[B]], 0
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; CHECK-NEXT: [[AND_1:%.*]] = and i1 [[C_2]], [[C_3]]
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; CHECK-NEXT: br i1 [[AND_1]], label [[IF_THEN_2:%.*]], label [[IF_END]]
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; CHECK: if.then.2:
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; CHECK-NEXT: [[ADD_0:%.*]] = add nsw i8 [[A]], [[B]]
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; CHECK-NEXT: [[T_0:%.*]] = icmp sge i8 [[ADD_0]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[T_0]])
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; CHECK-NEXT: [[ADD_1:%.*]] = add nsw i8 [[A]], [[A]]
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; CHECK-NEXT: [[T_1:%.*]] = icmp sge i8 [[ADD_0]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i8 [[A]], [[D:%.*]]
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; CHECK-NEXT: [[C_4:%.*]] = icmp sge i8 [[ADD_2]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[C_4]])
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; CHECK-NEXT: ret void
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%c.0 = icmp sge i8 %a, %c
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%c.1 = icmp sge i8 %b, %c
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%and.0 = and i1 %c.0, %c.1
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br i1 %and.0, label %if.then, label %if.end
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if.then: ; preds = %entry
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%c.2 = icmp sge i8 %a, 0
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%c.3 = icmp sge i8 %b, 0
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%and.1 = and i1 %c.2, %c.3
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br i1 %and.1, label %if.then.2, label %if.end
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if.then.2:
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%add.0 = add nsw i8 %a, %b
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%t.0 = icmp sge i8 %add.0, %c
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call void @use(i1 %t.0)
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%add.1 = add nsw i8 %a, %a
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%t.1 = icmp sge i8 %add.0, %c
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call void @use(i1 %t.1)
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%add.2 = add nsw i8 %a, %d
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%c.4 = icmp sge i8 %add.2, %c
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call void @use(i1 %c.4)
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ret void
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if.end: ; preds = %entry
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ret void
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}
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define void @test.decompose.nonconst.no.null.check(i8 %a, i8 %b, i8 %c, i8 %d) {
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; CHECK-LABEL: @test.decompose.nonconst.no.null.check(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C_0:%.*]] = icmp sge i8 [[A:%.*]], [[C:%.*]]
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; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[B:%.*]], [[C]]
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; CHECK-NEXT: [[AND_0:%.*]] = and i1 [[C_0]], [[C_1]]
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; CHECK-NEXT: br i1 [[AND_0]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[ADD_0:%.*]] = add nsw i8 [[A]], [[B]]
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; CHECK-NEXT: [[T_0:%.*]] = icmp sge i8 [[ADD_0]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[T_0]])
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; CHECK-NEXT: [[ADD_1:%.*]] = add nsw i8 [[A]], [[A]]
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; CHECK-NEXT: [[T_1:%.*]] = icmp sge i8 [[ADD_0]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i8 [[A]], [[D:%.*]]
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; CHECK-NEXT: [[C_4:%.*]] = icmp sge i8 [[ADD_2]], [[C]]
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; CHECK-NEXT: call void @use(i1 [[C_4]])
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; CHECK-NEXT: ret void
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%c.0 = icmp sge i8 %a, %c
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%c.1 = icmp sge i8 %b, %c
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%and.0 = and i1 %c.0, %c.1
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br i1 %and.0, label %if.then, label %if.end
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if.then: ; preds = %entry
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%add.0 = add nsw i8 %a, %b
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%t.0 = icmp sge i8 %add.0, %c
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call void @use(i1 %t.0)
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%add.1 = add nsw i8 %a, %a
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%t.1 = icmp sge i8 %add.0, %c
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call void @use(i1 %t.1)
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%add.2 = add nsw i8 %a, %d
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%c.4 = icmp sge i8 %add.2, %c
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call void @use(i1 %c.4)
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ret void
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if.end: ; preds = %entry
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ret void
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}
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declare void @use(i1)
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@ -52,6 +52,57 @@ if.end: ; preds = %entry
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ret void
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}
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define void @test.not.sge.ult(i8 %start, i8 %low, i8 %high) {
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; CHECK-LABEL: @test.not.sge.ult(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add i8 [[START:%.*]], 3
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; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
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; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: ret void
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; CHECK: if.end:
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; CHECK-NEXT: [[T_0:%.*]] = icmp slt i8 [[START]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_0]])
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; CHECK-NEXT: [[START_1:%.*]] = add i8 [[START]], 1
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; CHECK-NEXT: [[T_1:%.*]] = icmp slt i8 [[START_1]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_1]])
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; CHECK-NEXT: [[START_2:%.*]] = add i8 [[START]], 2
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; CHECK-NEXT: [[T_2:%.*]] = icmp slt i8 [[START_2]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_2]])
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; CHECK-NEXT: [[START_3:%.*]] = add i8 [[START]], 3
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; CHECK-NEXT: [[T_3:%.*]] = icmp slt i8 [[START_3]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[T_3]])
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; CHECK-NEXT: [[START_4:%.*]] = add i8 [[START]], 4
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; CHECK-NEXT: [[C_4:%.*]] = icmp slt i8 [[START_4]], [[HIGH]]
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; CHECK-NEXT: call void @use(i1 [[C_4]])
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; CHECK-NEXT: ret void
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;
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entry:
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%add.ptr.i = add i8 %start, 3
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%c.1 = icmp sge i8 %add.ptr.i, %high
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br i1 %c.1, label %if.then, label %if.end
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if.then: ; preds = %entry
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ret void
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if.end: ; preds = %entry
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%t.0 = icmp slt i8 %start, %high
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call void @use(i1 %t.0)
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%start.1 = add i8 %start, 1
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%t.1 = icmp slt i8 %start.1, %high
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call void @use(i1 %t.1)
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%start.2 = add i8 %start, 2
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%t.2 = icmp slt i8 %start.2, %high
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call void @use(i1 %t.2)
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%start.3 = add i8 %start, 3
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%t.3 = icmp slt i8 %start.3, %high
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call void @use(i1 %t.3)
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%start.4 = add i8 %start, 4
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%c.4 = icmp slt i8 %start.4, %high
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call void @use(i1 %c.4)
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ret void
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}
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define void @test.not.uge.ule(i8 %start, i8 %low, i8 %high) {
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; CHECK-LABEL: @test.not.uge.ule(
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; CHECK-NEXT: entry:
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@ -121,6 +121,126 @@ if.else:
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ret i1 %res.10
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}
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define i1 @test_add_nsw(i8 %start, i8 %low, i8 %high) {
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; CHECK-LABEL: @test_add_nsw(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
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; CHECK-NEXT: [[C_1:%.*]] = icmp sge i8 [[ADD_PTR_I]], [[HIGH:%.*]]
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; CHECK-NEXT: br i1 [[C_1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[UC_3:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
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; CHECK-NEXT: [[START_1_1:%.*]] = add nuw i8 [[START]], 1
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; CHECK-NEXT: [[UC_4:%.*]] = icmp uge i8 [[START_1_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_11:%.*]] = xor i1 [[UC_3]], [[UC_4]]
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; CHECK-NEXT: [[START_3_1:%.*]] = add nuw i8 [[START]], 3
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; CHECK-NEXT: [[T_0:%.*]] = icmp uge i8 [[START_3_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_12:%.*]] = xor i1 [[RES_11]], [[T_0]]
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; CHECK-NEXT: [[UC_5:%.*]] = icmp ugt i8 [[START_3_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_13:%.*]] = xor i1 [[RES_12]], [[UC_5]]
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; CHECK-NEXT: [[SC_8:%.*]] = icmp sge i8 [[START_1_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_14:%.*]] = xor i1 [[RES_13]], [[SC_8]]
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; CHECK-NEXT: [[SC_9:%.*]] = icmp sge i8 [[START_3_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_15:%.*]] = xor i1 [[RES_14]], [[SC_9]]
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; CHECK-NEXT: ret i1 [[RES_15]]
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; CHECK: if.else:
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; CHECK-NEXT: [[F_0:%.*]] = icmp ugt i8 [[START]], [[HIGH]]
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; CHECK-NEXT: [[START_1:%.*]] = add nuw i8 [[START]], 1
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; CHECK-NEXT: [[F_1:%.*]] = icmp uge i8 [[START_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_0:%.*]] = xor i1 [[F_0]], [[F_1]]
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; CHECK-NEXT: [[SC_1:%.*]] = icmp sgt i8 [[START]], [[HIGH]]
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; CHECK-NEXT: [[RES_1:%.*]] = xor i1 [[RES_0]], [[SC_1]]
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; CHECK-NEXT: [[SC_2:%.*]] = icmp sge i8 [[START_1]], [[HIGH]]
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; CHECK-NEXT: [[RES_2:%.*]] = xor i1 [[RES_1]], [[SC_2]]
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; CHECK-NEXT: [[START_2:%.*]] = add nuw i8 [[START]], 2
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; CHECK-NEXT: [[F_2:%.*]] = icmp uge i8 [[START_2]], [[HIGH]]
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; CHECK-NEXT: [[RES_3:%.*]] = xor i1 [[RES_2]], [[F_2]]
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; CHECK-NEXT: [[SC_3:%.*]] = icmp sge i8 [[START_2]], [[HIGH]]
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; CHECK-NEXT: [[RES_4:%.*]] = xor i1 [[RES_3]], [[SC_3]]
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; CHECK-NEXT: [[SC_4:%.*]] = icmp sle i8 [[START_2]], [[START_1]]
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; CHECK-NEXT: [[RES_5:%.*]] = xor i1 [[RES_4]], [[SC_4]]
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; CHECK-NEXT: [[START_3:%.*]] = add nuw i8 [[START]], 3
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; CHECK-NEXT: [[F_3:%.*]] = icmp uge i8 [[START_3]], [[HIGH]]
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; CHECK-NEXT: [[RES_6:%.*]] = xor i1 [[RES_5]], [[F_3]]
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; CHECK-NEXT: [[SC_5:%.*]] = icmp sge i8 [[START_3]], [[START_1]]
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; CHECK-NEXT: [[RES_7:%.*]] = xor i1 [[RES_6]], [[SC_5]]
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; CHECK-NEXT: [[START_4:%.*]] = add nuw i8 [[START]], 4
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; CHECK-NEXT: [[UC_2:%.*]] = icmp uge i8 [[START_4]], [[HIGH]]
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; CHECK-NEXT: [[RES_8:%.*]] = xor i1 [[RES_7]], [[UC_2]]
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; CHECK-NEXT: [[SC_6:%.*]] = icmp sge i8 [[START_4]], [[START_1]]
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; CHECK-NEXT: [[RES_9:%.*]] = xor i1 [[RES_8]], [[SC_6]]
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; CHECK-NEXT: [[SC_7:%.*]] = icmp sge i8 [[START_4]], [[HIGH]]
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; CHECK-NEXT: [[RES_10:%.*]] = xor i1 [[RES_9]], [[SC_7]]
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; CHECK-NEXT: ret i1 [[RES_10]]
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;
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entry:
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%add.ptr.i = add nsw i8 %start, 3
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%c.1 = icmp sge i8 %add.ptr.i, %high
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br i1 %c.1, label %if.then, label %if.else
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if.then:
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%uc.3 = icmp ugt i8 %start, %high
|
||||
%start.1.1 = add nuw i8 %start, 1
|
||||
%uc.4 = icmp uge i8 %start.1.1, %high
|
||||
%res.11 = xor i1 %uc.3, %uc.4
|
||||
|
||||
%start.3.1 = add nuw i8 %start, 3
|
||||
%t.0 = icmp uge i8 %start.3.1, %high
|
||||
%res.12 = xor i1 %res.11, %t.0
|
||||
|
||||
%uc.5 = icmp ugt i8 %start.3.1, %high
|
||||
%res.13 = xor i1 %res.12, %uc.5
|
||||
|
||||
%sc.8 = icmp sge i8 %start.1.1, %high
|
||||
%res.14 = xor i1 %res.13, %sc.8
|
||||
|
||||
%sc.9 = icmp sge i8 %start.3.1, %high
|
||||
%res.15 = xor i1 %res.14, %sc.9
|
||||
|
||||
ret i1 %res.15
|
||||
|
||||
if.else:
|
||||
%f.0 = icmp ugt i8 %start, %high
|
||||
%start.1 = add nuw i8 %start, 1
|
||||
%f.1 = icmp uge i8 %start.1, %high
|
||||
%res.0 = xor i1 %f.0, %f.1
|
||||
|
||||
%sc.1 = icmp sgt i8 %start, %high
|
||||
%res.1 = xor i1 %res.0, %sc.1
|
||||
|
||||
%sc.2 = icmp sge i8 %start.1, %high
|
||||
%res.2 = xor i1 %res.1, %sc.2
|
||||
|
||||
%start.2 = add nuw i8 %start, 2
|
||||
%f.2 = icmp uge i8 %start.2, %high
|
||||
%res.3 = xor i1 %res.2, %f.2
|
||||
|
||||
%sc.3 = icmp sge i8 %start.2, %high
|
||||
%res.4 = xor i1 %res.3, %sc.3
|
||||
|
||||
%sc.4 = icmp sle i8 %start.2, %start.1
|
||||
%res.5 = xor i1 %res.4, %sc.4
|
||||
|
||||
%start.3 = add nuw i8 %start, 3
|
||||
%f.3 = icmp uge i8 %start.3, %high
|
||||
%res.6 = xor i1 %res.5, %f.3
|
||||
|
||||
%sc.5 = icmp sge i8 %start.3, %start.1
|
||||
%res.7 = xor i1 %res.6, %sc.5
|
||||
|
||||
%start.4 = add nuw i8 %start, 4
|
||||
%uc.2 = icmp uge i8 %start.4, %high
|
||||
%res.8 = xor i1 %res.7, %uc.2
|
||||
|
||||
%sc.6 = icmp sge i8 %start.4, %start.1
|
||||
%res.9 = xor i1 %res.8, %sc.6
|
||||
|
||||
%sc.7 = icmp sge i8 %start.4, %high
|
||||
%res.10 = xor i1 %res.9, %sc.7
|
||||
|
||||
ret i1 %res.10
|
||||
}
|
||||
|
||||
|
||||
define i1 @test_sub_nuw(i8 %start, i8 %low, i8 %high) {
|
||||
; CHECK-LABEL: @test_sub_nuw(
|
||||
; CHECK-NEXT: entry:
|
||||
|
|
|
|||
Loading…
Reference in New Issue