From 670a6971f820fa9388b2d7260345f6f9823cc366 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 27 Jan 2019 21:01:23 +0000 Subject: [PATCH] [X86][SSE] Add UNDEF handling to combineSelect ISD::USUBSAT matching (PR40083) llvm-svn: 352330 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 12 ++++---- llvm/test/CodeGen/X86/psubus.ll | 37 +++++-------------------- 2 files changed, 14 insertions(+), 35 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e0830df512bd..ffe64f129bb2 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -34520,14 +34520,16 @@ static SDValue combineSelect(SDNode *N, SelectionDAG &DAG, // If the RHS is a constant we have to reverse the const // canonicalization. // x > C-1 ? x+-C : 0 --> subus x, C - // TODO: Handle build_vectors with undef elements. auto MatchUSUBSAT = [](ConstantSDNode *Op, ConstantSDNode *Cond) { - return Cond->getAPIntValue() == (-Op->getAPIntValue() - 1); + return (!Op && !Cond) || + (Op && Cond && + Cond->getAPIntValue() == (-Op->getAPIntValue() - 1)); }; if (CC == ISD::SETUGT && Other->getOpcode() == ISD::ADD && - ISD::matchBinaryPredicate(OpRHS, CondRHS, MatchUSUBSAT)) { - OpRHS = DAG.getNode(ISD::SUB, DL, VT, - DAG.getConstant(0, DL, VT), OpRHS); + ISD::matchBinaryPredicate(OpRHS, CondRHS, MatchUSUBSAT, + /*AllowUndefs*/ true)) { + OpRHS = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), + OpRHS); return DAG.getNode(ISD::USUBSAT, DL, VT, OpLHS, OpRHS); } diff --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll index a0d25ae04178..39dbf4061061 100644 --- a/llvm/test/CodeGen/X86/psubus.ll +++ b/llvm/test/CodeGen/X86/psubus.ll @@ -2752,38 +2752,15 @@ entry: define i64 @test31(<2 x i64> %x) { ; SSE-LABEL: test31: ; SSE: # %bb.0: -; SSE-NEXT: movdqa {{.*#+}} xmm1 = <70,70,70,70,70,70,70,70,u,u,u,u,u,u,u,u> -; SSE-NEXT: pminub %xmm0, %xmm1 -; SSE-NEXT: pcmpeqb %xmm0, %xmm1 -; SSE-NEXT: paddb {{.*}}(%rip), %xmm0 -; SSE-NEXT: pandn %xmm0, %xmm1 -; SSE-NEXT: movq %xmm1, %rax +; SSE-NEXT: psubusb {{.*}}(%rip), %xmm0 +; SSE-NEXT: movq %xmm0, %rax ; SSE-NEXT: retq ; -; AVX1-LABEL: test31: -; AVX1: # %bb.0: -; AVX1-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm1 -; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1 -; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 -; AVX1-NEXT: vpandn %xmm0, %xmm1, %xmm0 -; AVX1-NEXT: vmovq %xmm0, %rax -; AVX1-NEXT: retq -; -; AVX2-LABEL: test31: -; AVX2: # %bb.0: -; AVX2-NEXT: vpminub {{.*}}(%rip), %xmm0, %xmm1 -; AVX2-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm1 -; AVX2-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 -; AVX2-NEXT: vpandn %xmm0, %xmm1, %xmm0 -; AVX2-NEXT: vmovq %xmm0, %rax -; AVX2-NEXT: retq -; -; AVX512-LABEL: test31: -; AVX512: # %bb.0: -; AVX512-NEXT: vpcmpnleub {{.*}}(%rip), %xmm0, %k1 -; AVX512-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 {%k1} {z} -; AVX512-NEXT: vmovq %xmm0, %rax -; AVX512-NEXT: retq +; AVX-LABEL: test31: +; AVX: # %bb.0: +; AVX-NEXT: vpsubusb {{.*}}(%rip), %xmm0, %xmm0 +; AVX-NEXT: vmovq %xmm0, %rax +; AVX-NEXT: retq %t0 = bitcast <2 x i64> %x to <16 x i8> %cmp = icmp ugt <16 x i8> %t0, %bop = add <16 x i8> %t0,