forked from OSchip/llvm-project
R600: Enable the IR structurizer by default
llvm-svn: 195031
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827ec9b630
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@ -21,10 +21,10 @@ def FeatureDumpCode : SubtargetFeature <"DumpCode",
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"true",
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"Dump MachineInstrs in the CodeEmitter">;
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def FeatureIRStructurizer : SubtargetFeature <"enable-irstructurizer",
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def FeatureIRStructurizer : SubtargetFeature <"disable-irstructurizer",
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"EnableIRStructurizer",
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"true",
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"Enable IR Structurizer">;
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"false",
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"Disable IR Structurizer">;
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// Target features
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@ -36,7 +36,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
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Gen = AMDGPUSubtarget::R600;
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FP64 = false;
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CaymanISA = false;
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EnableIRStructurizer = false;
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EnableIRStructurizer = true;
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EnableIfCvt = true;
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ParseSubtargetFeatures(GPU, FS);
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DevName = GPU;
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@ -125,8 +125,7 @@ bool
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AMDGPUPassConfig::addPreISel() {
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const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
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addPass(createFlattenCFGPass());
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if (ST.IsIRStructurizerEnabled() ||
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ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS)
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if (ST.IsIRStructurizerEnabled())
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addPass(createStructurizeCFGPass());
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if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
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addPass(createSinkingPass());
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@ -1,6 +1,6 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: JUMP @5
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; CHECK: JUMP @3
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; CHECK: EXPORT
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; CHECK-NOT: EXPORT
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; RUN: llc < %s -march=r600 -mattr=disable-irstructurizer -mcpu=redwood | FileCheck %s
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; These tests make sure the compiler is optimizing branches using predicates
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; when it is legal to do so.
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; RUN: llc < %s -march=r600 -mcpu=redwood -mattr=disable-irstructurizer | FileCheck %s
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; Test case for a crash in the AMDILCFGStructurizer from a CFG like this:
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;
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; entry
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