forked from OSchip/llvm-project
Drop the SuperregHashTable. It is essentially the same as SubregHashTable.
llvm-svn: 104650
This commit is contained in:
parent
9fc11706e3
commit
66c939a2ca
|
@ -260,8 +260,6 @@ class TargetRegisterInfo {
|
|||
protected:
|
||||
const unsigned* SubregHash;
|
||||
const unsigned SubregHashSize;
|
||||
const unsigned* SuperregHash;
|
||||
const unsigned SuperregHashSize;
|
||||
const unsigned* AliasesHash;
|
||||
const unsigned AliasesHashSize;
|
||||
public:
|
||||
|
@ -284,8 +282,6 @@ protected:
|
|||
int CallFrameDestroyOpcode = -1,
|
||||
const unsigned* subregs = 0,
|
||||
const unsigned subregsize = 0,
|
||||
const unsigned* superregs = 0,
|
||||
const unsigned superregsize = 0,
|
||||
const unsigned* aliases = 0,
|
||||
const unsigned aliasessize = 0);
|
||||
virtual ~TargetRegisterInfo();
|
||||
|
@ -432,19 +428,7 @@ public:
|
|||
/// isSuperRegister - Returns true if regB is a super-register of regA.
|
||||
///
|
||||
bool isSuperRegister(unsigned regA, unsigned regB) const {
|
||||
// SuperregHash is a simple quadratically probed hash table.
|
||||
size_t index = (regA + regB * 37) & (SuperregHashSize-1);
|
||||
unsigned ProbeAmt = 2;
|
||||
while (SuperregHash[index*2] != 0 &&
|
||||
SuperregHash[index*2+1] != 0) {
|
||||
if (SuperregHash[index*2] == regA && SuperregHash[index*2+1] == regB)
|
||||
return true;
|
||||
|
||||
index = (index + ProbeAmt) & (SuperregHashSize-1);
|
||||
ProbeAmt += 2;
|
||||
}
|
||||
|
||||
return false;
|
||||
return isSubRegister(regB, regA);
|
||||
}
|
||||
|
||||
/// getCalleeSavedRegs - Return a null-terminated list of all of the
|
||||
|
|
|
@ -25,10 +25,8 @@ TargetRegisterInfo::TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
|
|||
const char *const *subregindexnames,
|
||||
int CFSO, int CFDO,
|
||||
const unsigned* subregs, const unsigned subregsize,
|
||||
const unsigned* superregs, const unsigned superregsize,
|
||||
const unsigned* aliases, const unsigned aliasessize)
|
||||
: SubregHash(subregs), SubregHashSize(subregsize),
|
||||
SuperregHash(superregs), SuperregHashSize(superregsize),
|
||||
AliasesHash(aliases), AliasesHashSize(aliasessize),
|
||||
Desc(D), SubRegIndexNames(subregindexnames), NumRegs(NR),
|
||||
RegClassBegin(RCB), RegClassEnd(RCE) {
|
||||
|
|
|
@ -576,83 +576,6 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
|
|||
delete [] SubregHashTable;
|
||||
|
||||
|
||||
// Print the SuperregHashTable, a simple quadratically probed
|
||||
// hash table for determining if a register is a super-register
|
||||
// of another register.
|
||||
unsigned NumSupRegs = 0;
|
||||
RegNo.clear();
|
||||
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
|
||||
RegNo[Regs[i].TheDef] = i;
|
||||
NumSupRegs += RegisterSuperRegs[Regs[i].TheDef].size();
|
||||
}
|
||||
|
||||
unsigned SuperregHashTableSize = 2 * NextPowerOf2(2 * NumSupRegs);
|
||||
unsigned* SuperregHashTable = new unsigned[2 * SuperregHashTableSize];
|
||||
std::fill(SuperregHashTable, SuperregHashTable + 2 * SuperregHashTableSize, ~0U);
|
||||
|
||||
hashMisses = 0;
|
||||
|
||||
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
|
||||
Record* R = Regs[i].TheDef;
|
||||
for (std::set<Record*>::iterator I = RegisterSuperRegs[R].begin(),
|
||||
E = RegisterSuperRegs[R].end(); I != E; ++I) {
|
||||
Record* RJ = *I;
|
||||
// We have to increase the indices of both registers by one when
|
||||
// computing the hash because, in the generated code, there
|
||||
// will be an extra empty slot at register 0.
|
||||
size_t index = ((i+1) + (RegNo[RJ]+1) * 37) & (SuperregHashTableSize-1);
|
||||
unsigned ProbeAmt = 2;
|
||||
while (SuperregHashTable[index*2] != ~0U &&
|
||||
SuperregHashTable[index*2+1] != ~0U) {
|
||||
index = (index + ProbeAmt) & (SuperregHashTableSize-1);
|
||||
ProbeAmt += 2;
|
||||
|
||||
hashMisses++;
|
||||
}
|
||||
|
||||
SuperregHashTable[index*2] = i;
|
||||
SuperregHashTable[index*2+1] = RegNo[RJ];
|
||||
}
|
||||
}
|
||||
|
||||
OS << "\n\n // Number of hash collisions: " << hashMisses << "\n";
|
||||
|
||||
if (SuperregHashTableSize) {
|
||||
std::string Namespace = Regs[0].TheDef->getValueAsString("Namespace");
|
||||
|
||||
OS << " const unsigned SuperregHashTable[] = { ";
|
||||
for (unsigned i = 0; i < SuperregHashTableSize - 1; ++i) {
|
||||
if (i != 0)
|
||||
// Insert spaces for nice formatting.
|
||||
OS << " ";
|
||||
|
||||
if (SuperregHashTable[2*i] != ~0U) {
|
||||
OS << getQualifiedName(Regs[SuperregHashTable[2*i]].TheDef) << ", "
|
||||
<< getQualifiedName(Regs[SuperregHashTable[2*i+1]].TheDef) << ", \n";
|
||||
} else {
|
||||
OS << Namespace << "::NoRegister, " << Namespace << "::NoRegister, \n";
|
||||
}
|
||||
}
|
||||
|
||||
unsigned Idx = SuperregHashTableSize*2-2;
|
||||
if (SuperregHashTable[Idx] != ~0U) {
|
||||
OS << " "
|
||||
<< getQualifiedName(Regs[SuperregHashTable[Idx]].TheDef) << ", "
|
||||
<< getQualifiedName(Regs[SuperregHashTable[Idx+1]].TheDef) << " };\n";
|
||||
} else {
|
||||
OS << Namespace << "::NoRegister, " << Namespace << "::NoRegister };\n";
|
||||
}
|
||||
|
||||
OS << " const unsigned SuperregHashTableSize = "
|
||||
<< SuperregHashTableSize << ";\n";
|
||||
} else {
|
||||
OS << " const unsigned SuperregHashTable[] = { ~0U, ~0U };\n"
|
||||
<< " const unsigned SuperregHashTableSize = 1;\n";
|
||||
}
|
||||
|
||||
delete [] SuperregHashTable;
|
||||
|
||||
|
||||
// Print the AliasHashTable, a simple quadratically probed
|
||||
// hash table for determining if a register aliases another register.
|
||||
unsigned NumAliases = 0;
|
||||
|
@ -792,9 +715,8 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
|
|||
|
||||
// Now that register alias and sub-registers sets have been emitted, emit the
|
||||
// register descriptors now.
|
||||
const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
|
||||
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
|
||||
const CodeGenRegister &Reg = Registers[i];
|
||||
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
|
||||
const CodeGenRegister &Reg = Regs[i];
|
||||
OS << " { \"";
|
||||
OS << Reg.getName() << "\",\t";
|
||||
if (RegisterAliases.count(Reg.TheDef))
|
||||
|
@ -885,12 +807,11 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
|
|||
// Emit the constructor of the class...
|
||||
OS << ClassName << "::" << ClassName
|
||||
<< "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
|
||||
<< " : TargetRegisterInfo(RegisterDescriptors, " << Registers.size()+1
|
||||
<< " : TargetRegisterInfo(RegisterDescriptors, " << Regs.size()+1
|
||||
<< ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n"
|
||||
<< " SubRegIndexTable,\n"
|
||||
<< " CallFrameSetupOpcode, CallFrameDestroyOpcode,\n"
|
||||
<< " SubregHashTable, SubregHashTableSize,\n"
|
||||
<< " SuperregHashTable, SuperregHashTableSize,\n"
|
||||
<< " AliasesHashTable, AliasesHashTableSize) {\n"
|
||||
<< "}\n\n";
|
||||
|
||||
|
@ -898,8 +819,8 @@ void RegisterInfoEmitter::run(raw_ostream &OS) {
|
|||
|
||||
// First, just pull all provided information to the map
|
||||
unsigned maxLength = 0;
|
||||
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
|
||||
Record *Reg = Registers[i].TheDef;
|
||||
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
|
||||
Record *Reg = Regs[i].TheDef;
|
||||
std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
|
||||
maxLength = std::max((size_t)maxLength, RegNums.size());
|
||||
if (DwarfRegNums.count(Reg))
|
||||
|
|
Loading…
Reference in New Issue