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DataFlowSanitizer: Convert most tests to opaque pointers 

This was pain every step of the way; there's still one to go.
This commit is contained in:
Matt Arsenault 2022-11-27 17:50:47 -05:00
parent f711452055
commit 66c3444f4c
31 changed files with 924 additions and 950 deletions
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51
llvm/test/Instrumentation/DataFlowSanitizer/abilist.ll
View File

@ -1,4 +1,4 @@
; RUN: opt < %s -passes=dfsan -dfsan-abilist=%S/Inputs/abilist.txt -S | FileCheck %s
; RUN: opt < %s -passes=dfsan -dfsan-abilist=%S/Inputs/abilist.txt -S | FileCheck -enable-var-scope %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ -16,7 +16,7 @@ define i32 @functional(i32 %a, i32 %b) {
ret i32 %c
}
@discardg = alias i32 (i32, i32)* (i32), i32 (i32, i32)* (i32)* @g
@discardg = alias ptr (i32), ptr @g
declare void @custom1(i32 %a, i32 %b)
@ -26,7 +26,7 @@ declare void @custom3(i32 %a, ...)
declare i32 @custom4(i32 %a, ...)
declare void @customcb(i32 (i32)* %cb)
declare void @customcb(ptr %cb)
declare i32 @cb(i32)
@ -39,59 +39,60 @@ define void @f(i32 %x) {
; CHECK: call void @__dfsw_custom1(i32 1, i32 2, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext 0)
call void @custom1(i32 1, i32 2)
; CHECK: call i32 @__dfsw_custom2(i32 1, i32 2, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext 0, i[[#SBITS]]* %[[LABELRETURN]])
; CHECK: call i32 @__dfsw_custom2(i32 1, i32 2, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext 0, ptr %[[LABELRETURN]])
call i32 @custom2(i32 1, i32 2)
; CHECK: call void @__dfsw_customcb({{.*}} @cb.dfsan, i[[#SBITS]] zeroext 0)
call void @customcb(i32 (i32)* @cb)
call void @customcb(ptr @cb)
; CHECK: %[[LABELVA1_0:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], ptr %[[LABELVA1]], i32 0, i32 0
; CHECK: store i[[#SBITS]] 0, ptr %[[LABELVA1_0]]
; CHECK: %[[LABELVA1_1:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], ptr %[[LABELVA1]], i32 0, i32 1
; CHECK: store i[[#SBITS]] %{{.*}}, ptr %[[LABELVA1_1]]
; CHECK: %[[LABELVA1_0A:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], ptr %[[LABELVA1]], i32 0, i32 0
; CHECK: call void (i32, i[[#SBITS]], ptr, ...) @__dfsw_custom3(i32 1, i[[#SBITS]] zeroext 0, ptr %[[LABELVA1_0A]], i32 2, i32 %{{.*}})
; CHECK: %[[LABELVA1_0:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* %[[LABELVA1]], i32 0, i32 0
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* %[[LABELVA1_0]]
; CHECK: %[[LABELVA1_1:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* %[[LABELVA1]], i32 0, i32 1
; CHECK: store i[[#SBITS]] %{{.*}}, i[[#SBITS]]* %[[LABELVA1_1]]
; CHECK: %[[LABELVA1_0A:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* %[[LABELVA1]], i32 0, i32 0
; CHECK: call void (i32, i[[#SBITS]], i[[#SBITS]]*, ...) @__dfsw_custom3(i32 1, i[[#SBITS]] zeroext 0, i[[#SBITS]]* %[[LABELVA1_0A]], i32 2, i32 %{{.*}})
call void (i32, ...) @custom3(i32 1, i32 2, i32 %x)
; CHECK: %[[LABELVA2_0:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* %[[LABELVA2]], i32 0, i32 0
; CHECK: %[[LABELVA2_0A:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* %[[LABELVA2]], i32 0, i32 0
; CHECK: call i32 (i32, i[[#SBITS]], i[[#SBITS]]*, i[[#SBITS]]*, ...) @__dfsw_custom4(i32 1, i[[#SBITS]] zeroext 0, i[[#SBITS]]* %[[LABELVA2_0A]], i[[#SBITS]]* %[[LABELRETURN]], i32 2, i32 3)
; CHECK: %[[LABELVA2_0:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], ptr %[[LABELVA2]], i32 0, i32 0
; CHECK: %[[LABELVA2_0A:.*]] = getelementptr inbounds [2 x i[[#SBITS]]], ptr %[[LABELVA2]], i32 0, i32 0
; CHECK: call i32 (i32, i[[#SBITS]], ptr, ptr, ...) @__dfsw_custom4(i32 1, i[[#SBITS]] zeroext 0, ptr %[[LABELVA2_0A]], ptr %[[LABELRETURN]], i32 2, i32 3)
call i32 (i32, ...) @custom4(i32 1, i32 2, i32 3)
ret void
}
; CHECK: @g.dfsan
define i32 (i32, i32)* @g(i32) {
define ptr @g(i32) {
; CHECK: ret {{.*}} @"dfsw$custom2"
ret i32 (i32, i32)* @custom2
ret ptr @custom2
}
; CHECK: define i32 (i32, i32)* @discardg(i32 %0)
; CHECK: %[[CALL:.*]] = call i32 (i32, i32)* @g.dfsan(i32 %0)
; CHECK: define ptr @discardg(i32 %0)
; CHECK: %[[CALL:.*]] = call ptr @g.dfsan(i32 %0)
; CHECK: load {{.*}} @__dfsan_retval_tls
; CHECK: ret {{.*}}
; CHECK: define i32 @adiscard.dfsan(i32 %0, i32 %1)
; CHECK: %[[CALL:.*]] = call i32 @discard(i32 %0, i32 %1)
; CHECK: ret i32
@adiscard = alias i32 (i32, i32), i32 (i32, i32)* @discard
@adiscard = alias i32 (i32, i32), ptr @discard
; CHECK: define linkonce_odr i32 @"dfsw$custom2"(i32 %0, i32 %1)
; CHECK: %[[LABELRETURN2:.*]] = alloca i[[#SBITS]]
; CHECK: %[[RV:.*]] = call i32 @__dfsw_custom2(i32 {{.*}}, i32 {{.*}}, i[[#SBITS]] {{.*}}, i[[#SBITS]] {{.*}}, i[[#SBITS]]* %[[LABELRETURN2]])
; CHECK: %[[RVSHADOW:.*]] = load i[[#SBITS]], i[[#SBITS]]* %[[LABELRETURN2]]
; CHECK: %[[RV:.*]] = call i32 @__dfsw_custom2(i32 {{.*}}, i32 {{.*}}, i[[#SBITS]] {{.*}}, i[[#SBITS]] {{.*}}, ptr %[[LABELRETURN2]])
; CHECK: %[[RVSHADOW:.*]] = load i[[#SBITS]], ptr %[[LABELRETURN2]]
; CHECK: store {{.*}} @__dfsan_retval_tls
; CHECK: ret i32
; CHECK: define linkonce_odr void @"dfsw$custom3"(i32 %0, ...)
; CHECK: call void @__dfsan_vararg_wrapper(i8*
; CHECK: call void @__dfsan_vararg_wrapper(ptr
; CHECK: unreachable
; CHECK: define linkonce_odr i32 @"dfsw$custom4"(i32 %0, ...)
; CHECK: declare void @__dfsw_custom1(i32, i32, i[[#SBITS]], i[[#SBITS]])
; CHECK: declare i32 @__dfsw_custom2(i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*)
; CHECK: declare i32 @__dfsw_custom2(i32, i32, i[[#SBITS]], i[[#SBITS]], ptr)
; CHECK: declare void @__dfsw_custom3(i32, i[[#SBITS]], i[[#SBITS]]*, ...)
; CHECK: declare i32 @__dfsw_custom4(i32, i[[#SBITS]], i[[#SBITS]]*, i[[#SBITS]]*, ...)
; CHECK: declare void @__dfsw_custom3(i32, i[[#SBITS]], ptr, ...)
; CHECK: declare i32 @__dfsw_custom4(i32, i[[#SBITS]], ptr, ptr, ...)

98
llvm/test/Instrumentation/DataFlowSanitizer/abilist_aggregate.ll
View File

@ -16,8 +16,8 @@ define {i1, i7} @functional({i32, i1} %a, [2 x i7] %b) {
define {i1, i7} @call_functional({i32, i1} %a, [2 x i7] %b) {
; CHECK-LABEL: @call_functional.dfsan
; CHECK-NEXT: %[[#REG:]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK-NEXT: %[[#REG+1]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK-NEXT: %[[#REG:]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK-NEXT: %[[#REG+1]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#REG+2]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } %[[#REG+1]], 0
; CHECK-NEXT: %[[#REG+3]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } %[[#REG+1]], 1
; CHECK-NEXT: %[[#REG+4]] = or i[[#SBITS]] %[[#REG+2]], %[[#REG+3]]
@ -27,7 +27,7 @@ define {i1, i7} @call_functional({i32, i1} %a, [2 x i7] %b) {
; CHECK-NEXT: %[[#REG+8]] = or i[[#SBITS]] %[[#REG+4]], %[[#REG+7]]
; CHECK-NEXT: %[[#REG+9]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] %[[#REG+8]], 0
; CHECK-NEXT: %[[#REG+10]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } %[[#REG+9]], i[[#SBITS]] %[[#REG+8]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } %[[#REG+10]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } %[[#REG+10]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%r = call {i1, i7} @functional({i32, i1} %a, [2 x i7] %b)
ret {i1, i7} %r
@ -44,7 +44,7 @@ define {i1, i7} @discard({i32, i1} %a, [2 x i7] %b) {
define {i1, i7} @call_discard({i32, i1} %a, [2 x i7] %b) {
; CHECK: @call_discard.dfsan
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, ptr @__dfsan_retval_tls, align 2
%r = call {i1, i7} @discard({i32, i1} %a, [2 x i7] %b)
ret {i1, i7} %r
@ -62,7 +62,7 @@ define {i1, i7} @uninstrumented({i32, i1} %a, [2 x i7] %b) {
define {i1, i7} @call_uninstrumented({i32, i1} %a, [2 x i7] %b) {
; CHECK: @call_uninstrumented.dfsan
; CHECK: call void @__dfsan_unimplemented
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, ptr @__dfsan_retval_tls, align 2
%r = call {i1, i7} @uninstrumented({i32, i1} %a, [2 x i7] %b)
ret {i1, i7} %r
@ -71,19 +71,19 @@ define {i1, i7} @call_uninstrumented({i32, i1} %a, [2 x i7] %b) {
define {i1, i7} @call_custom_with_ret({i32, i1} %a, [2 x i7] %b) {
; CHECK: @call_custom_with_ret.dfsan
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
; CHECK: [[B0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 0
; CHECK: [[B1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 1
; CHECK: [[B01:%.*]] = or i[[#SBITS]] [[B0]], [[B1]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 } %a, [2 x i7] %b, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], i[[#SBITS]]* %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 } %a, [2 x i7] %b, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], ptr %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RS0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[RE]], 0
; CHECK: [[RS1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[RS0]], i[[#SBITS]] [[RE]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK: ret { i1, i7 } [[R]]
%r = call {i1, i7} @custom_with_ret({i32, i1} %a, [2 x i7] %b)
@ -92,8 +92,8 @@ define {i1, i7} @call_custom_with_ret({i32, i1} %a, [2 x i7] %b) {
define void @call_custom_without_ret({i32, i1} %a, [2 x i7] %b) {
; CHECK: @call_custom_without_ret.dfsan
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
@ -108,19 +108,19 @@ define void @call_custom_without_ret({i32, i1} %a, [2 x i7] %b) {
define void @call_custom_varg({i32, i1} %a, [2 x i7] %b) {
; CHECK: @call_custom_varg.dfsan
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: %labelva = alloca [1 x i[[#SBITS]]], align [[#SBYTES]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
; CHECK: [[V0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: [[V0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: [[B0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 0
; CHECK: [[B1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 1
; CHECK: [[B01:%.*]] = or i[[#SBITS]] [[B0]], [[B1]]
; CHECK: store i[[#SBITS]] [[B01]], i[[#SBITS]]* [[V0]], align [[#SBYTES]]
; CHECK: [[V:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: call void ({ i32, i1 }, i[[#SBITS]], i[[#SBITS]]*, ...) @__dfsw_custom_varg({ i32, i1 } %a, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]]* [[V]], [2 x i7] %b)
; CHECK: store i[[#SBITS]] [[B01]], ptr [[V0]], align [[#SBYTES]]
; CHECK: [[V:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: call void ({ i32, i1 }, i[[#SBITS]], ptr, ...) @__dfsw_custom_varg({ i32, i1 } %a, i[[#SBITS]] zeroext [[A01]], ptr [[V]], [2 x i7] %b)
call void ({i32, i1}, ...) @custom_varg({i32, i1} %a, [2 x i7] %b)
ret void
@ -129,26 +129,26 @@ define void @call_custom_varg({i32, i1} %a, [2 x i7] %b) {
define {i1, i7} @call_custom_cb({i32, i1} %a, [2 x i7] %b) {
; CHECK: define { i1, i7 } @call_custom_cb.dfsan({ i32, i1 } %a, [2 x i7] %b) {
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
; CHECK: [[B0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 0
; CHECK: [[B1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 1
; CHECK: [[B01:%.*]] = or i[[#SBITS]] [[B0]], [[B1]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_cb({ i1, i7 } ({ i32, i1 }, [2 x i7])* @cb.dfsan, { i32, i1 } %a, [2 x i7] %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], i[[#SBITS]]* %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_cb(ptr @cb.dfsan, { i32, i1 } %a, [2 x i7] %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], ptr %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RS0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[RE]], 0
; CHECK: [[RS1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[RS0]], i[[#SBITS]] [[RE]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%r = call {i1, i7} @custom_cb({i1, i7} ({i32, i1}, [2 x i7])* @cb, {i32, i1} %a, [2 x i7] %b)
%r = call {i1, i7} @custom_cb(ptr @cb, {i32, i1} %a, [2 x i7] %b)
ret {i1, i7} %r
}
define {i1, i7} @custom_cb({i1, i7} ({i32, i1}, [2 x i7])* %cb, {i32, i1} %a, [2 x i7] %b) {
; CHECK: define { i1, i7 } @custom_cb({ i1, i7 } ({ i32, i1 }, [2 x i7])* %cb, { i32, i1 } %a, [2 x i7] %b)
define {i1, i7} @custom_cb(ptr %cb, {i32, i1} %a, [2 x i7] %b) {
; CHECK: define { i1, i7 } @custom_cb(ptr %cb, { i32, i1 } %a, [2 x i7] %b)
%r = call {i1, i7} %cb({i32, i1} %a, [2 x i7] %b)
ret {i1, i7} %r
@ -156,13 +156,13 @@ define {i1, i7} @custom_cb({i1, i7} ({i32, i1}, [2 x i7])* %cb, {i32, i1} %a, [2
define {i1, i7} @cb({i32, i1} %a, [2 x i7] %b) {
; CHECK: define { i1, i7 } @cb.dfsan({ i32, i1 } %a, [2 x i7] %b)
; CHECK: [[BL:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[AL:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[BL:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[AL:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[AL1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[AL]], 1
; CHECK: [[BL0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[BL]], 0
; CHECK: [[RL0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, i[[#SBITS]] [[AL1]], 0
; CHECK: [[RL:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[RL0]], i[[#SBITS]] [[BL0]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RL]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RL]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%a1 = extractvalue {i32, i1} %a, 1
%b0 = extractvalue [2 x i7] %b, 0
@ -171,49 +171,49 @@ define {i1, i7} @cb({i32, i1} %a, [2 x i7] %b) {
ret {i1, i7} %r1
}
define {i1, i7} ({i32, i1}, [2 x i7])* @ret_custom() {
define ptr @ret_custom() {
; CHECK: @ret_custom.dfsan
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK: ret {{.*}} @"dfsw$custom_with_ret"
ret {i1, i7} ({i32, i1}, [2 x i7])* @custom_with_ret
ret ptr @custom_with_ret
}
; CHECK: define linkonce_odr { i1, i7 } @"dfsw$custom_cb"({ i1, i7 } ({ i32, i1 }, [2 x i7])* %0, { i32, i1 } %1, [2 x i7] %2) {
; CHECK: define linkonce_odr { i1, i7 } @"dfsw$custom_cb"(ptr %0, { i32, i1 } %1, [2 x i7] %2) {
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; COMM: TODO simplify the expression [[#mul(2,SBYTES) + max(SBYTES,2)]] to
; COMM: [[#mul(3,SBYTES)]], if shadow-tls-alignment is updated to match shadow
; COMM: width bytes.
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES) + max(SBYTES,2)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[CB:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES) + max(SBYTES,2)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; CHECK: [[CB:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
; CHECK: [[B0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 0
; CHECK: [[B1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 1
; CHECK: [[B01:%.*]] = or i[[#SBITS]] [[B0]], [[B1]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_cb({ i1, i7 } ({ i32, i1 }, [2 x i7])* %0, { i32, i1 } %1, [2 x i7] %2, i[[#SBITS]] zeroext [[CB]], i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], i[[#SBITS]]* %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_cb(ptr %0, { i32, i1 } %1, [2 x i7] %2, i[[#SBITS]] zeroext [[CB]], i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], ptr %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RS0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[RE]], 0
; CHECK: [[RS1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[RS0]], i[[#SBITS]] [[RE]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
define {i1, i7} @custom_with_ret({i32, i1} %a, [2 x i7] %b) {
; CHECK: define linkonce_odr { i1, i7 } @"dfsw$custom_with_ret"({ i32, i1 } %0, [2 x i7] %1)
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
; CHECK: [[B0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 0
; CHECK: [[B1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[B]], 1
; CHECK: [[B01:%.*]] = or i[[#SBITS]] [[B0]], [[B1]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 } %0, [2 x i7] %1, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], i[[#SBITS]]* %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[R:%.*]] = call { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 } %0, [2 x i7] %1, i[[#SBITS]] zeroext [[A01]], i[[#SBITS]] zeroext [[B01]], ptr %labelreturn)
; CHECK: [[RE:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RS0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[RE]], 0
; CHECK: [[RS1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[RS0]], i[[#SBITS]] [[RE]], 1
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: store { i[[#SBITS]], i[[#SBITS]] } [[RS1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK: ret { i1, i7 } [[R]]
%a1 = extractvalue {i32, i1} %a, 1
%b0 = extractvalue [2 x i7] %b, 0
@ -224,8 +224,8 @@ define {i1, i7} @custom_with_ret({i32, i1} %a, [2 x i7] %b) {
define void @custom_without_ret({i32, i1} %a, [2 x i7] %b) {
; CHECK: define linkonce_odr void @"dfsw$custom_without_ret"({ i32, i1 } %0, [2 x i7] %1)
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([100 x i64]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; CHECK: [[B:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES)]]) to ptr), align [[ALIGN:2]]
; CHECK: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: [[A0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 0
; CHECK: [[A1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[A]], 1
; CHECK: [[A01:%.*]] = or i[[#SBITS]] [[A0]], [[A1]]
@ -244,8 +244,8 @@ define void @custom_varg({i32, i1} %a, ...) {
ret void
}
; CHECK: declare { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 }, [2 x i7], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*)
; CHECK: declare { i1, i7 } @__dfsw_custom_with_ret({ i32, i1 }, [2 x i7], i[[#SBITS]], i[[#SBITS]], ptr)
; CHECK: declare void @__dfsw_custom_without_ret({ i32, i1 }, [2 x i7], i[[#SBITS]], i[[#SBITS]])
; CHECK: declare void @__dfsw_custom_varg({ i32, i1 }, i[[#SBITS]], i[[#SBITS]]*, ...)
; CHECK: declare void @__dfsw_custom_varg({ i32, i1 }, i[[#SBITS]], ptr, ...)
; CHECK: declare { i1, i7 } @__dfsw_custom_cb({ i1, i7 } ({ i32, i1 }, [2 x i7])*, { i32, i1 }, [2 x i7], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*)
; CHECK: declare { i1, i7 } @__dfsw_custom_cb(ptr, { i32, i1 }, [2 x i7], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], ptr)

160
llvm/test/Instrumentation/DataFlowSanitizer/array.ll
View File

@ -13,11 +13,11 @@ target triple = "x86_64-unknown-linux-gnu"
define [4 x i8] @pass_array([4 x i8] %a) {
; NO_COMBINE_LOAD_PTR: @pass_array.dfsan
; NO_COMBINE_LOAD_PTR: %1 = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] %1, [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: %1 = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] %1, ptr @__dfsan_retval_tls, align [[ALIGN]]
; DEBUG_NONZERO_LABELS: @pass_array.dfsan
; DEBUG_NONZERO_LABELS: [[L:%.*]] = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN:2]]
; DEBUG_NONZERO_LABELS: [[L:%.*]] = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; DEBUG_NONZERO_LABELS: [[L0:%.*]] = extractvalue [4 x i[[#SBITS]]] [[L]], 0
; DEBUG_NONZERO_LABELS: [[L1:%.*]] = extractvalue [4 x i[[#SBITS]]] [[L]], 1
; DEBUG_NONZERO_LABELS: [[L01:%.*]] = or i[[#SBITS]] [[L0]], [[L1]]
@ -31,110 +31,110 @@ define [4 x i8] @pass_array([4 x i8] %a) {
ret [4 x i8] %a
}
%ArrayOfStruct = type [4 x {i8*, i32}]
%ArrayOfStruct = type [4 x {ptr, i32}]
define %ArrayOfStruct @pass_array_of_struct(%ArrayOfStruct %as) {
; NO_COMBINE_LOAD_PTR: @pass_array_of_struct.dfsan
; NO_COMBINE_LOAD_PTR: %1 = load [4 x { i[[#SBITS]], i[[#SBITS]] }], [4 x { i[[#SBITS]], i[[#SBITS]] }]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x { i[[#SBITS]], i[[#SBITS]] }]*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store [4 x { i[[#SBITS]], i[[#SBITS]] }] %1, [4 x { i[[#SBITS]], i[[#SBITS]] }]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x { i[[#SBITS]], i[[#SBITS]] }]*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: %1 = load [4 x { i[[#SBITS]], i[[#SBITS]] }], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store [4 x { i[[#SBITS]], i[[#SBITS]] }] %1, ptr @__dfsan_retval_tls, align [[ALIGN]]
ret %ArrayOfStruct %as
}
define [4 x i1]* @alloca_ret_array() {
define ptr @alloca_ret_array() {
; NO_COMBINE_LOAD_PTR: @alloca_ret_array.dfsan
; NO_COMBINE_LOAD_PTR: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; NO_COMBINE_LOAD_PTR: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
%p = alloca [4 x i1]
ret [4 x i1]* %p
ret ptr %p
}
define [4 x i1] @load_alloca_array() {
; NO_COMBINE_LOAD_PTR-LABEL: @load_alloca_array.dfsan
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R:]] = alloca i[[#SBITS]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR-NEXT: %p = alloca [4 x i1]
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+1]] = load i[[#SBITS]], i[[#SBITS]]* %[[#R]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+1]] = load i[[#SBITS]], ptr %[[#R]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+2]] = insertvalue [4 x i[[#SBITS]]] undef, i[[#SBITS]] %[[#R+1]], 0
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+3]] = insertvalue [4 x i[[#SBITS]]] %[[#R+2]], i[[#SBITS]] %[[#R+1]], 1
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+4]] = insertvalue [4 x i[[#SBITS]]] %[[#R+3]], i[[#SBITS]] %[[#R+1]], 2
; NO_COMBINE_LOAD_PTR-NEXT: %[[#R+5]] = insertvalue [4 x i[[#SBITS]]] %[[#R+4]], i[[#SBITS]] %[[#R+1]], 3
; NO_COMBINE_LOAD_PTR-NEXT: %a = load [4 x i1], [4 x i1]* %p
; NO_COMBINE_LOAD_PTR-NEXT: store [4 x i[[#SBITS]]] %[[#R+5]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align 2
; NO_COMBINE_LOAD_PTR-NEXT: %a = load [4 x i1], ptr %p
; NO_COMBINE_LOAD_PTR-NEXT: store [4 x i[[#SBITS]]] %[[#R+5]], ptr @__dfsan_retval_tls, align 2
; NO_COMBINE_LOAD_PTR-NEXT: ret [4 x i1] %a
%p = alloca [4 x i1]
%a = load [4 x i1], [4 x i1]* %p
%a = load [4 x i1], ptr %p
ret [4 x i1] %a
}
define [0 x i1] @load_array0([0 x i1]* %p) {
define [0 x i1] @load_array0(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_array0.dfsan
; NO_COMBINE_LOAD_PTR: store [0 x i[[#SBITS]]] zeroinitializer, [0 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [0 x i[[#SBITS]]]*), align 2
%a = load [0 x i1], [0 x i1]* %p
; NO_COMBINE_LOAD_PTR: store [0 x i[[#SBITS]]] zeroinitializer, ptr @__dfsan_retval_tls, align 2
%a = load [0 x i1], ptr %p
ret [0 x i1] %a
}
define [1 x i1] @load_array1([1 x i1]* %p) {
define [1 x i1] @load_array1(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_array1.dfsan
; NO_COMBINE_LOAD_PTR: [[L:%.*]] = load i[[#SBITS]],
; NO_COMBINE_LOAD_PTR: [[S:%.*]] = insertvalue [1 x i[[#SBITS]]] undef, i[[#SBITS]] [[L]], 0
; NO_COMBINE_LOAD_PTR: store [1 x i[[#SBITS]]] [[S]], [1 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [1 x i[[#SBITS]]]*), align 2
; NO_COMBINE_LOAD_PTR: store [1 x i[[#SBITS]]] [[S]], ptr @__dfsan_retval_tls, align 2
; EVENT_CALLBACKS: @load_array1.dfsan
; EVENT_CALLBACKS: [[L:%.*]] = or i[[#SBITS]]
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[L]], i8* {{.*}})
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[L]], ptr {{.*}})
; FAST: @load_array1.dfsan
; FAST: [[P:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: [[L:%.*]] = load i[[#SBITS]], i[[#SBITS]]* {{.*}}, align [[#SBYTES]]
; FAST: [[P:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[L:%.*]] = load i[[#SBITS]], ptr {{.*}}, align [[#SBYTES]]
; FAST: [[U:%.*]] = or i[[#SBITS]] [[L]], [[P]]
; FAST: [[S1:%.*]] = insertvalue [1 x i[[#SBITS]]] undef, i[[#SBITS]] [[U]], 0
; FAST: store [1 x i[[#SBITS]]] [[S1]], [1 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [1 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: store [1 x i[[#SBITS]]] [[S1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%a = load [1 x i1], [1 x i1]* %p
%a = load [1 x i1], ptr %p
ret [1 x i1] %a
}
define [2 x i1] @load_array2([2 x i1]* %p) {
define [2 x i1] @load_array2(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_array2.dfsan
; NO_COMBINE_LOAD_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P0:%.*]], i64 1
; NO_COMBINE_LOAD_PTR-DAG: [[E1:%.*]] = load i[[#SBITS]], i[[#SBITS]]* [[P1]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR-DAG: [[E0:%.*]] = load i[[#SBITS]], i[[#SBITS]]* [[P0]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], ptr [[P0:%.*]], i64 1
; NO_COMBINE_LOAD_PTR-DAG: [[E1:%.*]] = load i[[#SBITS]], ptr [[P1]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR-DAG: [[E0:%.*]] = load i[[#SBITS]], ptr [[P0]], align [[#SBYTES]]
; NO_COMBINE_LOAD_PTR: [[U:%.*]] = or i[[#SBITS]] [[E0]], [[E1]]
; NO_COMBINE_LOAD_PTR: [[S1:%.*]] = insertvalue [2 x i[[#SBITS]]] undef, i[[#SBITS]] [[U]], 0
; NO_COMBINE_LOAD_PTR: [[S2:%.*]] = insertvalue [2 x i[[#SBITS]]] [[S1]], i[[#SBITS]] [[U]], 1
; NO_COMBINE_LOAD_PTR: store [2 x i[[#SBITS]]] [[S2]], [2 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store [2 x i[[#SBITS]]] [[S2]], ptr @__dfsan_retval_tls, align [[ALIGN:2]]
; EVENT_CALLBACKS: @load_array2.dfsan
; EVENT_CALLBACKS: [[O1:%.*]] = or i[[#SBITS]]
; EVENT_CALLBACKS: [[O2:%.*]] = or i[[#SBITS]] [[O1]]
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[O2]], i8* {{.*}})
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[O2]], ptr {{.*}})
; FAST: @load_array2.dfsan
; FAST: [[P:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: [[P:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[O:%.*]] = or i[[#SBITS]]
; FAST: [[U:%.*]] = or i[[#SBITS]] [[O]], [[P]]
; FAST: [[S:%.*]] = insertvalue [2 x i[[#SBITS]]] undef, i[[#SBITS]] [[U]], 0
; FAST: [[S1:%.*]] = insertvalue [2 x i[[#SBITS]]] [[S]], i[[#SBITS]] [[U]], 1
; FAST: store [2 x i[[#SBITS]]] [[S1]], [2 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [2 x i[[#SBITS]]]*), align [[ALIGN]]
%a = load [2 x i1], [2 x i1]* %p
; FAST: store [2 x i[[#SBITS]]] [[S1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%a = load [2 x i1], ptr %p
ret [2 x i1] %a
}
define [4 x i1] @load_array4([4 x i1]* %p) {
define [4 x i1] @load_array4(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_array4.dfsan
; NO_COMBINE_LOAD_PTR: [[T:%.*]] = trunc i[[#mul(4, SBITS)]] {{.*}} to i[[#SBITS]]
; NO_COMBINE_LOAD_PTR: [[S1:%.*]] = insertvalue [4 x i[[#SBITS]]] undef, i[[#SBITS]] [[T]], 0
; NO_COMBINE_LOAD_PTR: [[S2:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S1]], i[[#SBITS]] [[T]], 1
; NO_COMBINE_LOAD_PTR: [[S3:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S2]], i[[#SBITS]] [[T]], 2
; NO_COMBINE_LOAD_PTR: [[S4:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S3]], i[[#SBITS]] [[T]], 3
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] [[S4]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align 2
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] [[S4]], ptr @__dfsan_retval_tls, align 2
; EVENT_CALLBACKS: @load_array4.dfsan
; EVENT_CALLBACKS: [[O0:%.*]] = or i[[#mul(4, SBITS)]]
; EVENT_CALLBACKS: [[O1:%.*]] = or i[[#mul(4, SBITS)]] [[O0]]
; EVENT_CALLBACKS: [[O2:%.*]] = trunc i[[#mul(4, SBITS)]] [[O1]] to i[[#SBITS]]
; EVENT_CALLBACKS: [[O3:%.*]] = or i[[#SBITS]] [[O2]]
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[O3]], i8* {{.*}})
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[O3]], ptr {{.*}})
; FAST: @load_array4.dfsan
; FAST: [[T:%.*]] = trunc i[[#mul(4, SBITS)]] {{.*}} to i[[#SBITS]]
@ -143,35 +143,35 @@ define [4 x i1] @load_array4([4 x i1]* %p) {
; FAST: [[S2:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S1]], i[[#SBITS]] [[O]], 1
; FAST: [[S3:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S2]], i[[#SBITS]] [[O]], 2
; FAST: [[S4:%.*]] = insertvalue [4 x i[[#SBITS]]] [[S3]], i[[#SBITS]] [[O]], 3
; FAST: store [4 x i[[#SBITS]]] [[S4]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align 2
; FAST: store [4 x i[[#SBITS]]] [[S4]], ptr @__dfsan_retval_tls, align 2
%a = load [4 x i1], [4 x i1]* %p
%a = load [4 x i1], ptr %p
ret [4 x i1] %a
}
define i1 @extract_array([4 x i1] %a) {
; NO_COMBINE_LOAD_PTR: @extract_array.dfsan
; NO_COMBINE_LOAD_PTR: [[AM:%.*]] = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: [[AM:%.*]] = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: [[EM:%.*]] = extractvalue [4 x i[[#SBITS]]] [[AM]], 2
; NO_COMBINE_LOAD_PTR: store i[[#SBITS]] [[EM]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; NO_COMBINE_LOAD_PTR: store i[[#SBITS]] [[EM]], ptr @__dfsan_retval_tls, align 2
%e2 = extractvalue [4 x i1] %a, 2
ret i1 %e2
}
define [4 x i1] @insert_array([4 x i1] %a, i1 %e2) {
; NO_COMBINE_LOAD_PTR: @insert_array.dfsan
; NO_COMBINE_LOAD_PTR: [[EM:%.*]] = load i[[#SBITS]], i[[#SBITS]]*
; NO_COMBINE_LOAD_PTR-SAME: inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(4, SBYTES)]]) to i[[#SBITS]]*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: [[AM:%.*]] = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: [[EM:%.*]] = load i[[#SBITS]], ptr
; NO_COMBINE_LOAD_PTR-SAME: inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(4, SBYTES)]]) to ptr), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: [[AM:%.*]] = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: [[AM1:%.*]] = insertvalue [4 x i[[#SBITS]]] [[AM]], i[[#SBITS]] [[EM]], 0
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] [[AM1]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: store [4 x i[[#SBITS]]] [[AM1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%a1 = insertvalue [4 x i1] %a, i1 %e2, 0
ret [4 x i1] %a1
}
define void @store_alloca_array([4 x i1] %a) {
; FAST: @store_alloca_array.dfsan
; FAST: [[S:%.*]] = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN:2]]
; FAST: [[S:%.*]] = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[SP:%.*]] = alloca i[[#SBITS]], align [[#SBYTES]]
; FAST: [[E0:%.*]] = extractvalue [4 x i[[#SBITS]]] [[S]], 0
; FAST: [[E1:%.*]] = extractvalue [4 x i[[#SBITS]]] [[S]], 1
@ -180,50 +180,49 @@ define void @store_alloca_array([4 x i1] %a) {
; FAST: [[E012:%.*]] = or i[[#SBITS]] [[E01]], [[E2]]
; FAST: [[E3:%.*]] = extractvalue [4 x i[[#SBITS]]] [[S]], 3
; FAST: [[E0123:%.*]] = or i[[#SBITS]] [[E012]], [[E3]]
; FAST: store i[[#SBITS]] [[E0123]], i[[#SBITS]]* [[SP]], align [[#SBYTES]]
; FAST: store i[[#SBITS]] [[E0123]], ptr [[SP]], align [[#SBYTES]]
%p = alloca [4 x i1]
store [4 x i1] %a, [4 x i1]* %p
store [4 x i1] %a, ptr %p
ret void
}
define void @store_zero_array([4 x i1]* %p) {
define void @store_zero_array(ptr %p) {
; FAST: @store_zero_array.dfsan
; FAST: store i[[#mul(4, SBITS)]] 0, i[[#mul(4, SBITS)]]* {{.*}}
store [4 x i1] zeroinitializer, [4 x i1]* %p
; FAST: store i[[#mul(4, SBITS)]] 0, ptr {{.*}}
store [4 x i1] zeroinitializer, ptr %p
ret void
}
define void @store_array2([2 x i1] %a, [2 x i1]* %p) {
define void @store_array2([2 x i1] %a, ptr %p) {
; EVENT_CALLBACKS: @store_array2.dfsan
; EVENT_CALLBACKS: [[E12:%.*]] = or i[[#SBITS]]
; EVENT_CALLBACKS: [[P:%.*]] = bitcast [2 x i1]* %p to i8*
; EVENT_CALLBACKS: call void @__dfsan_store_callback(i[[#SBITS]] [[E12]], i8* [[P]])
; EVENT_CALLBACKS: call void @__dfsan_store_callback(i[[#SBITS]] [[E12]], ptr %p)
; FAST: @store_array2.dfsan
; FAST: [[S:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [2 x i[[#SBITS]]]*), align [[ALIGN:2]]
; FAST: [[S:%.*]] = load [2 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[S]], 0
; FAST: [[E2:%.*]] = extractvalue [2 x i[[#SBITS]]] [[S]], 1
; FAST: [[E12:%.*]] = or i[[#SBITS]] [[E1]], [[E2]]
; FAST: [[SP0:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[SP:%.*]], i32 0
; FAST: store i[[#SBITS]] [[E12]], i[[#SBITS]]* [[SP0]], align [[#SBYTES]]
; FAST: [[SP1:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[SP]], i32 1
; FAST: store i[[#SBITS]] [[E12]], i[[#SBITS]]* [[SP1]], align [[#SBYTES]]
; FAST: [[SP0:%.*]] = getelementptr i[[#SBITS]], ptr [[SP:%.*]], i32 0
; FAST: store i[[#SBITS]] [[E12]], ptr [[SP0]], align [[#SBYTES]]
; FAST: [[SP1:%.*]] = getelementptr i[[#SBITS]], ptr [[SP]], i32 1
; FAST: store i[[#SBITS]] [[E12]], ptr [[SP1]], align [[#SBYTES]]
; COMBINE_STORE_PTR: @store_array2.dfsan
; COMBINE_STORE_PTR: [[O:%.*]] = or i[[#SBITS]]
; COMBINE_STORE_PTR: [[U:%.*]] = or i[[#SBITS]] [[O]]
; COMBINE_STORE_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P:%.*]], i32 0
; COMBINE_STORE_PTR: store i[[#SBITS]] [[U]], i[[#SBITS]]* [[P1]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P2:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P]], i32 1
; COMBINE_STORE_PTR: store i[[#SBITS]] [[U]], i[[#SBITS]]* [[P2]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], ptr [[P:%.*]], i32 0
; COMBINE_STORE_PTR: store i[[#SBITS]] [[U]], ptr [[P1]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P2:%.*]] = getelementptr i[[#SBITS]], ptr [[P]], i32 1
; COMBINE_STORE_PTR: store i[[#SBITS]] [[U]], ptr [[P2]], align [[#SBYTES]]
store [2 x i1] %a, [2 x i1]* %p
store [2 x i1] %a, ptr %p
ret void
}
define void @store_array17([17 x i1] %a, [17 x i1]* %p) {
define void @store_array17([17 x i1] %a, ptr %p) {
; FAST: @store_array17.dfsan
; FAST: %[[#R:]] = load [17 x i[[#SBITS]]], [17 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [17 x i[[#SBITS]]]*), align 2
; FAST: %[[#R:]] = load [17 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align 2
; FAST: %[[#R+1]] = extractvalue [17 x i[[#SBITS]]] %[[#R]], 0
; FAST: %[[#R+2]] = extractvalue [17 x i[[#SBITS]]] %[[#R]], 1
; FAST: %[[#R+3]] = or i[[#SBITS]] %[[#R+1]], %[[#R+2]]
@ -265,29 +264,28 @@ define void @store_array17([17 x i1] %a, [17 x i1]* %p) {
; FAST: %[[#VREG+5]] = insertelement <8 x i[[#SBITS]]> %[[#VREG+4]], i[[#SBITS]] %[[#R+33]], i32 5
; FAST: %[[#VREG+6]] = insertelement <8 x i[[#SBITS]]> %[[#VREG+5]], i[[#SBITS]] %[[#R+33]], i32 6
; FAST: %[[#VREG+7]] = insertelement <8 x i[[#SBITS]]> %[[#VREG+6]], i[[#SBITS]] %[[#R+33]], i32 7
; FAST: %[[#VREG+8]] = bitcast i[[#SBITS]]* %[[P:.*]] to <8 x i[[#SBITS]]>*
; FAST: %[[#VREG+9]] = getelementptr <8 x i[[#SBITS]]>, <8 x i[[#SBITS]]>* %[[#VREG+8]], i32 0
; FAST: store <8 x i[[#SBITS]]> %[[#VREG+7]], <8 x i[[#SBITS]]>* %[[#VREG+9]], align [[#SBYTES]]
; FAST: %[[#VREG+10]] = getelementptr <8 x i[[#SBITS]]>, <8 x i[[#SBITS]]>* %[[#VREG+8]], i32 1
; FAST: store <8 x i[[#SBITS]]> %[[#VREG+7]], <8 x i[[#SBITS]]>* %[[#VREG+10]], align [[#SBYTES]]
; FAST: %[[#VREG+11]] = getelementptr i[[#SBITS]], i[[#SBITS]]* %[[P]], i32 16
; FAST: store i[[#SBITS]] %[[#R+33]], i[[#SBITS]]* %[[#VREG+11]], align [[#SBYTES]]
store [17 x i1] %a, [17 x i1]* %p
; FAST: %[[#VREG+8]] = getelementptr <8 x i[[#SBITS]]>, ptr %[[P:.*]], i32 0
; FAST: store <8 x i[[#SBITS]]> %[[#VREG+7]], ptr %[[#VREG+8]], align [[#SBYTES]]
; FAST: %[[#VREG+9]] = getelementptr <8 x i[[#SBITS]]>, ptr %[[P]], i32 1
; FAST: store <8 x i[[#SBITS]]> %[[#VREG+7]], ptr %[[#VREG+9]], align [[#SBYTES]]
; FAST: %[[#VREG+10]] = getelementptr i[[#SBITS]], ptr %[[P]], i32 16
; FAST: store i[[#SBITS]] %[[#R+33]], ptr %[[#VREG+10]], align [[#SBYTES]]
store [17 x i1] %a, ptr %p
ret void
}
define [2 x i32] @const_array() {
; FAST: @const_array.dfsan
; FAST: store [2 x i[[#SBITS]]] zeroinitializer, [2 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [2 x i[[#SBITS]]]*), align 2
; FAST: store [2 x i[[#SBITS]]] zeroinitializer, ptr @__dfsan_retval_tls, align 2
ret [2 x i32] [ i32 42, i32 11 ]
}
define [4 x i8] @call_array([4 x i8] %a) {
; FAST-LABEL: @call_array.dfsan
; FAST: %[[#R:]] = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN:2]]
; FAST: store [4 x i[[#SBITS]]] %[[#R]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: %_dfsret = load [4 x i[[#SBITS]]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: store [4 x i[[#SBITS]]] %_dfsret, [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: %[[#R:]] = load [4 x i[[#SBITS]]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: store [4 x i[[#SBITS]]] %[[#R]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: %_dfsret = load [4 x i[[#SBITS]]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; FAST: store [4 x i[[#SBITS]]] %_dfsret, ptr @__dfsan_retval_tls, align [[ALIGN]]
%r = call [4 x i8] @pass_array([4 x i8] %a)
ret [4 x i8] %r
@ -297,7 +295,7 @@ define [4 x i8] @call_array([4 x i8] %a) {
define i8 @fun_with_large_args(i1 %i, %LargeArr %a) {
; FAST: @fun_with_large_args.dfsan
; FAST: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; FAST: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
%r = extractvalue %LargeArr %a, 0
ret i8 %r
}
@ -310,7 +308,7 @@ define %LargeArr @fun_with_large_ret() {
define i8 @call_fun_with_large_ret() {
; FAST: @call_fun_with_large_ret.dfsan
; FAST: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; FAST: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
%r = call %LargeArr @fun_with_large_ret()
%e = extractvalue %LargeArr %r, 0
ret i8 %e
@ -318,8 +316,8 @@ define i8 @call_fun_with_large_ret() {
define i8 @call_fun_with_large_args(i1 %i, %LargeArr %a) {
; FAST: @call_fun_with_large_args.dfsan
; FAST: [[I:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: store i[[#SBITS]] [[I]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: [[I:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: store i[[#SBITS]] [[I]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: %r = call i8 @fun_with_large_args.dfsan(i1 %i, [1000 x i8] %a)
%r = call i8 @fun_with_large_args(i1 %i, %LargeArr %a)

212
llvm/test/Instrumentation/DataFlowSanitizer/atomics.ll
View File

@ -9,270 +9,258 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define i32 @AtomicRmwXchg(i32* %p, i32 %x) {
define i32 @AtomicRmwXchg(ptr %p, i32 %x) {
entry:
; COMM: atomicrmw xchg: store clean shadow/origin, return clean shadow/origin
; CHECK-LABEL: @AtomicRmwXchg.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw xchg i32* %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS:mul(SBITS,4)]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw xchg ptr %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
%0 = atomicrmw xchg i32* %p, i32 %x seq_cst
%0 = atomicrmw xchg ptr %p, i32 %x seq_cst
ret i32 %0
}
define i32 @AtomicRmwMax(i32* %p, i32 %x) {
define i32 @AtomicRmwMax(ptr %p, i32 %x) {
; COMM: atomicrmw max: exactly the same as above
; CHECK-LABEL: @AtomicRmwMax.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw max i32* %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: atomicrmw max ptr %p, i32 %x seq_cst
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%0 = atomicrmw max i32* %p, i32 %x seq_cst
%0 = atomicrmw max ptr %p, i32 %x seq_cst
ret i32 %0
}
define i32 @Cmpxchg(i32* %p, i32 %a, i32 %b) {
define i32 @Cmpxchg(ptr %p, i32 %a, i32 %b) {
; COMM: cmpxchg: store clean shadow/origin, return clean shadow/origin
; CHECK-LABEL: @Cmpxchg.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg ptr %p, i32 %a, i32 %b seq_cst seq_cst
; CHECK: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%pair = cmpxchg i32* %p, i32 %a, i32 %b seq_cst seq_cst
%pair = cmpxchg ptr %p, i32 %a, i32 %b seq_cst seq_cst
%0 = extractvalue { i32, i1 } %pair, 0
ret i32 %0
}
define i32 @CmpxchgMonotonic(i32* %p, i32 %a, i32 %b) {
define i32 @CmpxchgMonotonic(ptr %p, i32 %a, i32 %b) {
; COMM: relaxed cmpxchg: bump up to "release monotonic"
; CHECK-LABEL: @CmpxchgMonotonic.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg i32* %p, i32 %a, i32 %b release monotonic
; CHECK: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %pair = cmpxchg ptr %p, i32 %a, i32 %b release monotonic
; CHECK: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32
entry:
%pair = cmpxchg i32* %p, i32 %a, i32 %b monotonic monotonic
%pair = cmpxchg ptr %p, i32 %a, i32 %b monotonic monotonic
%0 = extractvalue { i32, i1 } %pair, 0
ret i32 %0
}
define i32 @AtomicLoad(i32* %p) {
define i32 @AtomicLoad(ptr %p) {
; COMM: atomic load: load shadow value after app value
; CHECK-LABEL: @AtomicLoad.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p seq_cst, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK_ORIGIN: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: %a = load atomic i32, ptr %p seq_cst, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 16
; CHECK: load i[[#NUM_BITS]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i[[#SBITS]] %[[#AP_S]], ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p seq_cst, align 16
%a = load atomic i32, ptr %p seq_cst, align 16
ret i32 %a
}
define i32 @AtomicLoadAcquire(i32* %p) {
define i32 @AtomicLoadAcquire(ptr %p) {
; COMM: atomic load: load shadow value after app value
; CHECK-LABEL: @AtomicLoadAcquire.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK_ORIGIN: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: %a = load atomic i32, ptr %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 16
; CHECK: load i[[#NUM_BITS]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i[[#SBITS]] %[[#AP_S]], ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p acquire, align 16
%a = load atomic i32, ptr %p acquire, align 16
ret i32 %a
}
define i32 @AtomicLoadMonotonic(i32* %p) {
define i32 @AtomicLoadMonotonic(ptr %p) {
; COMM: atomic load monotonic: bump up to load acquire
; CHECK-LABEL: @AtomicLoadMonotonic.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK_ORIGIN: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: %a = load atomic i32, ptr %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 16
; CHECK: load i[[#NUM_BITS]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i[[#SBITS]] %[[#AP_S]], ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p monotonic, align 16
%a = load atomic i32, ptr %p monotonic, align 16
ret i32 %a
}
define i32 @AtomicLoadUnordered(i32* %p) {
define i32 @AtomicLoadUnordered(ptr %p) {
; COMM: atomic load unordered: bump up to load acquire
; CHECK-LABEL: @AtomicLoadUnordered.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: %a = load atomic i32, i32* %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to i[[#SBITS]]*
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to i32*
; CHECK_ORIGIN: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 16
; CHECK: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK: load i[[#NUM_BITS]], i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK_ORIGIN: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: %a = load atomic i32, ptr %p acquire, align 16
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#ORIGIN_PTR:]] = inttoptr i64 {{.*}} to ptr
; CHECK_ORIGIN: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 16
; CHECK: load i[[#NUM_BITS]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: %[[#AP_S:]] = or i[[#SBITS]] {{.*}}, %[[#PS]]
; CHECK_ORIGIN: %[[#PS_NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK_ORIGIN: %[[#AP_O:]] = select i1 %[[#PS_NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK: store i[[#SBITS]] %[[#AP_S]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i[[#SBITS]] %[[#AP_S]], ptr @__dfsan_retval_tls, align 2
; CHECK_ORIGIN: store i32 %[[#AP_O]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %a
entry:
%a = load atomic i32, i32* %p unordered, align 16
%a = load atomic i32, ptr %p unordered, align 16
ret i32 %a
}
define void @AtomicStore(i32* %p, i32 %x) {
define void @AtomicStore(ptr %p, i32 %x) {
; COMM: atomic store: store clean shadow value before app value
; CHECK-LABEL: @AtomicStore.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p seq_cst, align 16
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, ptr %p seq_cst, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p seq_cst, align 16
store atomic i32 %x, ptr %p seq_cst, align 16
ret void
}
define void @AtomicStoreRelease(i32* %p, i32 %x) {
define void @AtomicStoreRelease(ptr %p, i32 %x) {
; COMM: atomic store: store clean shadow value before app value
; CHECK-LABEL: @AtomicStoreRelease.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, ptr %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p release, align 16
store atomic i32 %x, ptr %p release, align 16
ret void
}
define void @AtomicStoreMonotonic(i32* %p, i32 %x) {
define void @AtomicStoreMonotonic(ptr %p, i32 %x) {
; COMM: atomic store monotonic: bumped up to store release
; CHECK-LABEL: @AtomicStoreMonotonic.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, ptr %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p monotonic, align 16
store atomic i32 %x, ptr %p monotonic, align 16
ret void
}
define void @AtomicStoreUnordered(i32* %p, i32 %x) {
define void @AtomicStoreUnordered(ptr %p, i32 %x) {
; COMM: atomic store unordered: bumped up to store release
; CHECK-LABEL: @AtomicStoreUnordered.dfsan
; CHECK-NOT: @__dfsan_arg_origin_tls
; CHECK-NOT: @__dfsan_arg_tls
; CHECK_ORIGIN-NOT: 35184372088832
; CHECK: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR64:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#NUM_BITS:mul(SBITS,4)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SHADOW_PTR64]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, i32* %p release, align 16
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: store i[[#NUM_BITS]] 0, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK: store atomic i32 %x, ptr %p release, align 16
; CHECK: ret void
entry:
store atomic i32 %x, i32* %p unordered, align 16
store atomic i32 %x, ptr %p unordered, align 16
ret void
}

28
llvm/test/Instrumentation/DataFlowSanitizer/basic.ll
View File

@ -14,38 +14,38 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define i8 @load(i8* %p) {
define i8 @load(ptr %p) {
; CHECK-LABEL: define i8 @load.dfsan
; CHECK: xor i64 {{.*}}, [[SHADOW_XOR_MASK]]
; CHECK: ret i8 %a
%a = load i8, i8* %p
%a = load i8, ptr %p
ret i8 %a
}
define void @store(i8* %p) {
define void @store(ptr %p) {
; CHECK-LABEL: define void @store.dfsan
; CHECK: xor i64 {{.*}}, [[SHADOW_XOR_MASK]]
; CHECK: ret void
store i8 0, i8* %p
store i8 0, ptr %p
ret void
}
; CHECK: declare void @__dfsan_load_callback(i[[#SBITS]], i8*)
; CHECK: declare void @__dfsan_store_callback(i[[#SBITS]], i8*)
; CHECK: declare void @__dfsan_mem_transfer_callback(i[[#SBITS]]*, i64)
; CHECK: declare void @__dfsan_load_callback(i[[#SBITS]], ptr)
; CHECK: declare void @__dfsan_store_callback(i[[#SBITS]], ptr)
; CHECK: declare void @__dfsan_mem_transfer_callback(ptr, i64)
; CHECK: declare void @__dfsan_cmp_callback(i[[#SBITS]])
; CHECK: ; Function Attrs: nounwind memory(read)
; CHECK-NEXT: declare zeroext i[[#SBITS]] @__dfsan_union_load(i[[#SBITS]]*, i64)
; CHECK-NEXT: declare zeroext i[[#SBITS]] @__dfsan_union_load(ptr, i64)
; CHECK: ; Function Attrs: nounwind memory(read)
; CHECK-NEXT: declare zeroext i64 @__dfsan_load_label_and_origin(i8*, i64)
; CHECK-NEXT: declare zeroext i64 @__dfsan_load_label_and_origin(ptr, i64)
; CHECK: declare void @__dfsan_unimplemented(i8*)
; CHECK: declare void @__dfsan_set_label(i[[#SBITS]] zeroext, i32 zeroext, i8*, i64)
; CHECK: declare void @__dfsan_unimplemented(ptr)
; CHECK: declare void @__dfsan_set_label(i[[#SBITS]] zeroext, i32 zeroext, ptr, i64)
; CHECK: declare void @__dfsan_nonzero_label()
; CHECK: declare void @__dfsan_vararg_wrapper(i8*)
; CHECK: declare void @__dfsan_vararg_wrapper(ptr)
; CHECK: declare zeroext i32 @__dfsan_chain_origin(i32 zeroext)
; CHECK: declare zeroext i32 @__dfsan_chain_origin_if_tainted(i[[#SBITS]] zeroext, i32 zeroext)
; CHECK: declare void @__dfsan_mem_origin_transfer(i8*, i8*, i64)
; CHECK: declare void @__dfsan_maybe_store_origin(i[[#SBITS]] zeroext, i8*, i64, i32 zeroext)
; CHECK: declare void @__dfsan_mem_origin_transfer(ptr, ptr, i64)
; CHECK: declare void @__dfsan_maybe_store_origin(i[[#SBITS]] zeroext, ptr, i64, i32 zeroext)

16
llvm/test/Instrumentation/DataFlowSanitizer/call.ll
View File

@ -28,29 +28,29 @@ define i32 @call() {
declare i32 @__gxx_personality_v0(...)
declare i8* @__cxa_begin_catch(i8*)
declare ptr @__cxa_begin_catch(ptr)
declare void @__cxa_end_catch()
declare void @g(...)
; CHECK-LABEL: @h.dfsan
; CHECK: personality {{.*}} @__gxx_personality_v0.dfsan {{.*}} {
define i32 @h() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
; CHECK: personality {{.*}} @__gxx_personality_v0.dfsan {
define i32 @h() personality ptr @__gxx_personality_v0 {
entry:
; CHECK: invoke void (...) @g.dfsan(i32 42)
invoke void (...) @g(i32 42)
to label %try.cont unwind label %lpad
lpad:
%0 = landingpad { i8*, i32 }
catch i8* null
%1 = extractvalue { i8*, i32 } %0, 0
%0 = landingpad { ptr, i32 }
catch ptr null
%1 = extractvalue { ptr, i32 } %0, 0
; CHECK: store {{.*}} @__dfsan_arg_tls
; CHECK: store {{.*}} @__dfsan_arg_tls
; CHECK: call {{.*}} @__cxa_begin_catch.dfsan
; CHECK: load {{.*}} @__dfsan_retval_tls
%2 = tail call i8* @__cxa_begin_catch(i8* %1)
%2 = tail call ptr @__cxa_begin_catch(ptr %1)
; CHECK: call {{.*}} @__cxa_end_catch.dfsan
tail call void @__cxa_end_catch()

22
llvm/test/Instrumentation/DataFlowSanitizer/callback.ll
View File

@ -5,28 +5,28 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define i8 @load8(i8* %p) {
; CHECK: call void @__dfsan_load_callback(i[[#SBITS]] %[[LABEL:.*]], i8* %p)
; CHECK: %a = load i8, i8* %p
; CHECK: store i[[#SBITS]] %[[LABEL]], i[[#SBITS]]* bitcast ({{.*}}* @__dfsan_retval_tls to i[[#SBITS]]*)
define i8 @load8(ptr %p) {
; CHECK: call void @__dfsan_load_callback(i[[#SBITS]] %[[LABEL:.*]], ptr %p)
; CHECK: %a = load i8, ptr %p
; CHECK: store i[[#SBITS]] %[[LABEL]], ptr @__dfsan_retval_tls
%a = load i8, i8* %p
%a = load i8, ptr %p
ret i8 %a
}
define void @store8(i8* %p, i8 %a) {
; CHECK: store i[[#SBITS]] %[[LABEL:.*]], i[[#SBITS]]* %{{.*}}
; CHECK: call void @__dfsan_store_callback(i[[#SBITS]] %[[LABEL]], i8* %p)
; CHECK: store i8 %a, i8* %p
define void @store8(ptr %p, i8 %a) {
; CHECK: store i[[#SBITS]] %[[LABEL:.*]], ptr %{{.*}}
; CHECK: call void @__dfsan_store_callback(i[[#SBITS]] %[[LABEL]], ptr %p)
; CHECK: store i8 %a, ptr %p
store i8 %a, i8* %p
store i8 %a, ptr %p
ret void
}
define i1 @cmp(i8 %a, i8 %b) {
; CHECK: call void @__dfsan_cmp_callback(i[[#SBITS]] %[[CMPLABEL:.*]])
; CHECK: %c = icmp ne i8 %a, %b
; CHECK: store i[[#SBITS]] %[[CMPLABEL]], i[[#SBITS]]* bitcast ({{.*}}* @__dfsan_retval_tls to i[[#SBITS]]*)
; CHECK: store i[[#SBITS]] %[[CMPLABEL]], ptr @__dfsan_retval_tls
%c = icmp ne i8 %a, %b
ret i1 %c

14
llvm/test/Instrumentation/DataFlowSanitizer/custom_fun_callback_attributes.ll
View File

@ -3,30 +3,30 @@ target triple = "x86_64-unknown-linux-gnu"
; Declare custom functions. Inputs/abilist.txt causes any function with a
; name matching /custom.*/ to be a custom function.
declare i32 @custom_fun_one_callback(i8 (i32, double)* %callback_arg)
declare i32 @custom_fun_one_callback(ptr %callback_arg)
declare i32 @custom_fun_two_callbacks(
i8 (i32, double)* %callback_arg1,
ptr %callback_arg1,
i64 %an_int,
i8 (i32, double)* %callback_arg2
ptr %callback_arg2
)
declare i8 @a_callback_fun(i32, double)
; CHECK-LABEL: @call_custom_funs_with_callbacks.dfsan
define void @call_custom_funs_with_callbacks(i8 (i32, double)* %callback_arg) {
define void @call_custom_funs_with_callbacks(ptr %callback_arg) {
;; The callback should have attribute 'nonnull':
; CHECK: call signext i32 @__dfsw_custom_fun_one_callback(
%call1 = call signext i32 @custom_fun_one_callback(
i8 (i32, double)* nonnull @a_callback_fun
ptr nonnull @a_callback_fun
)
;; Call a custom function with two callbacks. Check their annotations.
; CHECK: call i32 @__dfsw_custom_fun_two_callbacks(
; CHECK: i64 12345
%call2 = call i32 @custom_fun_two_callbacks(
i8 (i32, double)* nonnull @a_callback_fun,
ptr nonnull @a_callback_fun,
i64 12345,
i8 (i32, double)* noalias @a_callback_fun
ptr noalias @a_callback_fun
)
ret void
}

8
llvm/test/Instrumentation/DataFlowSanitizer/custom_fun_varargs_attributes.ll
View File

@ -8,19 +8,19 @@ target triple = "x86_64-unknown-linux-gnu"
declare i16 @custom_varargs(i64, ...)
; CHECK-LABEL: @call_custom_varargs.dfsan
define void @call_custom_varargs(i8* %buf) {
define void @call_custom_varargs(ptr %buf) {
;; All arguments have an annotation. Check that the transformed function
;; preserves each annotation.
; CHECK: call zeroext i16 (i64, i[[#SBITS]], i[[#SBITS]]*, i[[#SBITS]]*, ...)
; CHECK: call zeroext i16 (i64, i[[#SBITS]], ptr, ptr, ...)
; CHECK-SAME: @__dfsw_custom_varargs
; CHECK-SAME: i64 signext 200
; CHECK-SAME: i8* nonnull
; CHECK-SAME: ptr nonnull
; CHECK-SAME: i64 zeroext 20
; CHECK-SAME: i32 signext 1
%call = call zeroext i16 (i64, ...) @custom_varargs(
i64 signext 200,
i8* nonnull %buf,
ptr nonnull %buf,
i64 zeroext 20,
i32 signext 1
)

6
llvm/test/Instrumentation/DataFlowSanitizer/debug-nonzero-labels.ll
View File

@ -18,15 +18,15 @@ define i32 @f(i32, i32) {
; CHECK: [[ARGCMP2:%.*]] = icmp ne i[[#SBITS]] [[ARGLABEL2]], 0
; CHECK: br i1 [[ARGCMP2]]
%x = add i32 %0, %1
store i32 %x, i32* %i
store i32 %x, ptr %i
; CHECK: [[CALL:%.*]] = call i32 @g.dfsan()
; CHECK: [[RETLABEL:%.*]] = load i[[#SBITS]], {{.*}} @__dfsan_retval_tls
; CHECK: [[CALLCMP:%.*]] = icmp ne i[[#SBITS]] [[RETLABEL]], 0
; CHECK: br i1 [[CALLCMP]]
%call = call i32 @g()
; CHECK: [[LOCALLABEL:%.*]] = load i[[#SBITS]], i[[#SBITS]]* [[LOCALLABELALLOCA]]
; CHECK: [[LOCALLABEL:%.*]] = load i[[#SBITS]], ptr [[LOCALLABELALLOCA]]
; CHECK: [[LOCALCMP:%.*]] = icmp ne i[[#SBITS]] [[LOCALLABEL]], 0
; CHECK: br i1 [[LOCALCMP]]
%load = load i32, i32* %i
%load = load i32, ptr %i
ret i32 %load
}

16
llvm/test/Instrumentation/DataFlowSanitizer/dont_combine_offset_labels_on_gep.ll
View File

@ -7,15 +7,15 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_retval_tls = external thread_local(initialexec) global [[TLS_ARR]]
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
define i32* @gepop([10 x [20 x i32]]* %p, i32 %a, i32 %b, i32 %c) {
define ptr @gepop(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK: @gepop.dfsan
; CHECK_ORIGIN: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align [[ALIGN_O:4]]
; CHECK: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN_S:2]]
; CHECK: %e = getelementptr [10 x [20 x i32]], [10 x [20 x i32]]* %p, i32 %a, i32 %b, i32 %c
; CHECK: store i[[#SBITS]] %[[#PS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN_S]]
; CHECK_ORIGIN: store i32 %[[#PO]], i32* @__dfsan_retval_origin_tls, align [[ALIGN_O]]
; CHECK_ORIGIN: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align [[ALIGN_O:4]]
; CHECK: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN_S:2]]
; CHECK: %e = getelementptr [10 x [20 x i32]], ptr %p, i32 %a, i32 %b, i32 %c
; CHECK: store i[[#SBITS]] %[[#PS]], ptr @__dfsan_retval_tls, align [[ALIGN_S]]
; CHECK_ORIGIN: store i32 %[[#PO]], ptr @__dfsan_retval_origin_tls, align [[ALIGN_O]]
%e = getelementptr [10 x [20 x i32]], [10 x [20 x i32]]* %p, i32 %a, i32 %b, i32 %c
ret i32* %e
%e = getelementptr [10 x [20 x i32]], ptr %p, i32 %a, i32 %b, i32 %c
ret ptr %e
}

2
llvm/test/Instrumentation/DataFlowSanitizer/extern_weak.ll
View File

@ -13,7 +13,7 @@ define noundef i8 @call_if_exists() local_unnamed_addr {
; CHECK-LABEL: @call_if_exists.dfsan
; Ensure comparison is preserved
; CHECK: br i1 icmp ne ([[FUNCPTRTY:.*]] @ExternWeak, [[FUNCPTRTY]] null), label %use_func, label %avoid_func
br i1 icmp ne (i8 (i8)* @ExternWeak, i8 (i8)* null), label %use_func, label %avoid_func
br i1 icmp ne (ptr @ExternWeak, ptr null), label %use_func, label %avoid_func
use_func:
; CHECK: use_func:

9
llvm/test/Instrumentation/DataFlowSanitizer/force_zero.ll
View File

@ -2,14 +2,13 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
define i32 @function_to_force_zero(i32 %0, i32* %1) {
define i32 @function_to_force_zero(i32 %0, ptr %1) {
; CHECK-LABEL: define i32 @function_to_force_zero.dfsan
; CHECK: %[[#SHADOW_XOR:]] = xor i64 {{.*}}, [[SHADOW_XOR_MASK]]
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_XOR]] to i8*
; CHECK: %[[#SHADOW_BITCAST:]] = bitcast i8* %[[#SHADOW_PTR]] to i32*
; CHECK: store i32 0, i32* %[[#SHADOW_BITCAST]]
; CHECK: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_XOR]] to ptr
; CHECK: store i32 0, ptr %[[#SHADOW_PTR]]
; CHECK: store i32 %{{.*}}
store i32 %0, i32* %1, align 4
store i32 %0, ptr %1, align 4
; CHECK: store i8 0, {{.*}}@__dfsan_retval_tls
; CHECK: ret i32
ret i32 %0

12
llvm/test/Instrumentation/DataFlowSanitizer/ignore_persnality_routine.ll
View File

@ -6,7 +6,7 @@ target triple = "x86_64-unknown-linux-gnu"
declare i32 @__gxx_personality_v0(...)
declare i8* @__cxa_begin_catch(i8*)
declare ptr @__cxa_begin_catch(ptr)
declare void @__cxa_end_catch()
@ -16,15 +16,15 @@ declare void @g(...)
; CHECK-SAME: personality {{.*}}@"dfsw$__gxx_personality_v0"{{.*}}
; CHECK-IGNORE-LABEL: @h.dfsan
; CHECK-IGNORE-SAME: personality {{.*}}__gxx_personality_v0{{.*}}
define i32 @h() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
define i32 @h() personality ptr @__gxx_personality_v0 {
invoke void (...) @g(i32 42)
to label %try.cont unwind label %lpad
lpad:
%1 = landingpad { i8*, i32 }
catch i8* null
%2 = extractvalue { i8*, i32 } %1, 0
%3 = tail call i8* @__cxa_begin_catch(i8* %2)
%1 = landingpad { ptr, i32 }
catch ptr null
%2 = extractvalue { ptr, i32 } %1, 0
%3 = tail call ptr @__cxa_begin_catch(ptr %2)
tail call void @__cxa_end_catch()
br label %try.cont

121
llvm/test/Instrumentation/DataFlowSanitizer/load.ll
View File

@ -9,82 +9,80 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define {} @load0({}* %p) {
define {} @load0(ptr %p) {
; CHECK-LABEL: @load0.dfsan
; CHECK-NEXT: %a = load {}, {}* %p, align 1
; CHECK-NEXT: store {} zeroinitializer, {}* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to {}*), align [[ALIGN:2]]
; CHECK-NEXT: %a = load {}, ptr %p, align 1
; CHECK-NEXT: store {} zeroinitializer, ptr @__dfsan_retval_tls, align [[ALIGN:2]]
; CHECK-NEXT: ret {} %a
%a = load {}, {}* %p
%a = load {}, ptr %p
ret {} %a
}
define i8 @load8(i8* %p) {
define i8 @load8(ptr %p) {
; CHECK-LABEL: @load8.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i8* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR]]
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i8, i8* %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i8, ptr %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i8 %a
%a = load i8, i8* %p
%a = load i8, ptr %p
ret i8 %a
}
define i16 @load16(i16* %p) {
define i16 @load16(ptr %p) {
; CHECK-LABEL: @load16.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i16* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR+1]] = getelementptr i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR+1]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#SHADOW_PTR+1]] = getelementptr i[[#SBITS]], ptr %[[#SHADOW_PTR]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR+1]]
; CHECK-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#SHADOW+1]]
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i16, i16* %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i16, ptr %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i16 %a
%a = load i16, i16* %p
%a = load i16, ptr %p
ret i16 %a
}
define i32 @load32(i32* %p) {
define i32 @load32(ptr %p) {
; CHECK-LABEL: @load32.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i32* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#WSBITS:mul(SBITS,4)]]*
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i[[#WSBITS]], i[[#WSBITS]]* %[[#WIDE_SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i[[#WSBITS:mul(SBITS,4)]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW]], [[#mul(SBITS,2)]]
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i[[#WSBITS]] %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW]], [[#SBITS]]
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i[[#WSBITS]] %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#SHADOW:]] = trunc i[[#WSBITS]] %[[#WIDE_SHADOW]] to i[[#SBITS]]
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i32, i32* %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i32, ptr %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i32 %a
%a = load i32, i32* %p
%a = load i32, ptr %p
ret i32 %a
}
define i64 @load64(i64* %p) {
define i64 @load64(ptr %p) {
; CHECK-LABEL: @load64.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i64* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i64*
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, i64* %[[#WIDE_SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 16
@ -93,24 +91,23 @@ define i64 @load64(i64* %p) {
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#SHADOW:]] = trunc i64 %[[#WIDE_SHADOW]] to i[[#SBITS]]
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i64, i64* %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i64, ptr %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i64 %a
%a = load i64, i64* %p
%a = load i64, ptr %p
ret i64 %a
}
define i128 @load128(i128* %p) {
define i128 @load128(ptr %p) {
; CHECK-LABEL: @load128.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i128* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i64*
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, i64* %[[#WIDE_SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR2:]] = getelementptr i64, i64* %[[#WIDE_SHADOW_PTR]], i64 1
; CHECK-NEXT: %[[#WIDE_SHADOW2:]] = load i64, i64* %[[#WIDE_SHADOW_PTR2]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR2:]] = getelementptr i64, ptr %[[#SHADOW_PTR]], i64 1
; CHECK-NEXT: %[[#WIDE_SHADOW2:]] = load i64, ptr %[[#WIDE_SHADOW_PTR2]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW2]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
@ -120,38 +117,38 @@ define i128 @load128(i128* %p) {
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#SHADOW:]] = trunc i64 %[[#WIDE_SHADOW]] to i[[#SBITS]]
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i128, i128* %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i128, ptr %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i128 %a
%a = load i128, i128* %p
%a = load i128, ptr %p
ret i128 %a
}
define i17 @load17(i17* %p) {
define i17 @load17(ptr %p) {
; CHECK-LABEL: @load17.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i17* %p to i64
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW:]] = call zeroext i8 @__dfsan_union_load(i[[#SBITS]]* %[[#SHADOW_PTR]], i64 3)
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#SHADOW:]] = call zeroext i8 @__dfsan_union_load(ptr %[[#SHADOW_PTR]], i64 3)
; COMBINE_LOAD_PTR-NEXT: %[[#SHADOW:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#PS]]
; CHECK-NEXT: %a = load i17, i17* %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i17, ptr %p
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i17 %a
%a = load i17, i17* %p
%a = load i17, ptr %p
ret i17 %a
}
@X = constant i1 1
define i1 @load_global() {
; CHECK-LABEL: @load_global.dfsan
; CHECK-NEXT: %a = load i1, i1* @X
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %a = load i1, ptr @X
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i1 %a
%a = load i1, i1* @X
%a = load i1, ptr @X
ret i1 %a
}

26
llvm/test/Instrumentation/DataFlowSanitizer/lookup_table.ll
View File

@ -13,33 +13,33 @@ target triple = "x86_64-unknown-linux-gnu"
define i8 @load_lookup_table_a(i8 %p) {
; CHECK-LABEL: @load_lookup_table_a.dfsan
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; CHECK-NEXT: %c = zext i8 %p to i64
; CHECK-NEXT: %b = getelementptr inbounds [256 x i8], [256 x i8]* @lookup_table_a, i64 0, i64 %c
; CHECK-NEXT: %a = load i8, i8* %b, align 1
; CHECK-NEXT: %b = getelementptr inbounds [256 x i8], ptr @lookup_table_a, i64 0, i64 %c
; CHECK-NEXT: %a = load i8, ptr %b, align 1
; Propagates p shadow when lookup_table_a flag is provided, otherwise propagates 0 shadow
; LOOKUP_A-NEXT: store i[[#SBITS]] %[[#PS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; NO_LOOKUP_A-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; LOOKUP_A-NEXT: store i[[#SBITS]] %[[#PS]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; NO_LOOKUP_A-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i8 %a
%c = zext i8 %p to i64
%b = getelementptr inbounds [256 x i8], [256 x i8]* @lookup_table_a, i64 0, i64 %c
%a = load i8, i8* %b
%b = getelementptr inbounds [256 x i8], ptr @lookup_table_a, i64 0, i64 %c
%a = load i8, ptr %b
ret i8 %a
}
define i8 @load_lookup_table_b(i8 %p) {
; CHECK-LABEL: @load_lookup_table_b.dfsan
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK-NEXT: %c = zext i8 %p to i64
; CHECK-NEXT: %b = getelementptr inbounds [256 x i8], [256 x i8]* @lookup_table_b, i64 0, i64 %c
; CHECK-NEXT: %a = load i8, i8* %b, align 1
; CHECK-NEXT: %b = getelementptr inbounds [256 x i8], ptr @lookup_table_b, i64 0, i64 %c
; CHECK-NEXT: %a = load i8, ptr %b, align 1
; Propagates 0 shadow
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret i8 %a
%c = zext i8 %p to i64
%b = getelementptr inbounds [256 x i8], [256 x i8]* @lookup_table_b, i64 0, i64 %c
%a = load i8, i8* %b, align 1
%b = getelementptr inbounds [256 x i8], ptr @lookup_table_b, i64 0, i64 %c
%a = load i8, ptr %b, align 1
ret i8 %a
}

10
llvm/test/Instrumentation/DataFlowSanitizer/memset.ll
View File

@ -5,13 +5,13 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)
define void @ms(i8* %p, i8 %v) {
define void @ms(ptr %p, i8 %v) {
; CHECK-LABEL: @ms.dfsan
; CHECK-SAME: (i8* %p, i8 %v)
; CHECK-SAME: (ptr %p, i8 %v)
; CHECK: %[[ARGLABEL:.*]] = load i[[#SBITS]], {{.*}} @__dfsan_arg_tls
; CHECK: call void @__dfsan_set_label(i[[#SBITS]] %[[ARGLABEL]], i32 0, i8* %p, i64 1)
call void @llvm.memset.p0i8.i64(i8* %p, i8 %v, i64 1, i1 1)
; CHECK: call void @__dfsan_set_label(i[[#SBITS]] %[[ARGLABEL]], i32 0, ptr %p, i64 1)
call void @llvm.memset.p0.i64(ptr %p, i8 %v, i64 1, i1 1)
ret void
}

16
llvm/test/Instrumentation/DataFlowSanitizer/musttailcall.ll
View File

@ -45,15 +45,13 @@ define i32 @outer_caller() {
ret i32 %r
}
declare i32* @mismatching_callee(i32)
declare ptr @mismatching_callee(i32)
; CHECK-LABEL: define i8* @mismatching_musttail_call.dfsan
define i8* @mismatching_musttail_call(i32) {
%r = musttail call i32* @mismatching_callee(i32 %0)
; CHECK: musttail call i32* @mismatching_callee.dfsan
; CHECK-LABEL: define ptr @mismatching_musttail_call.dfsan
define ptr @mismatching_musttail_call(i32) {
%r = musttail call ptr @mismatching_callee(i32 %0)
; CHECK: musttail call ptr @mismatching_callee.dfsan
; COMM: No instrumentation between call and ret.
; CHECK-NEXT: bitcast i32* {{.*}} to i8*
%c = bitcast i32* %r to i8*
; CHECK-NEXT: ret i8*
ret i8* %c
; CHECK-NEXT: ret ptr
ret ptr %r
}

226
llvm/test/Instrumentation/DataFlowSanitizer/origin_abilist.ll
View File

@ -13,7 +13,7 @@ define i32 @discard(i32 %a, i32 %b) {
define i32 @call_discard(i32 %a, i32 %b) {
; CHECK: @call_discard.dfsan
; CHECK: %r = call i32 @discard(i32 %a, i32 %b)
; CHECK: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %r
%r = call i32 @discard(i32 %a, i32 %b)
@ -27,11 +27,11 @@ define i32 @functional(i32 %a, i32 %b) {
}
define i32 @call_functional(i32 %a, i32 %b) {
; CHECK: @call_functional.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-LABEL: @call_functional.dfsan
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls
; CHECK: [[RO:%.*]] = select i1 {{.*}}, i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
%r = call i32 @functional(i32 %a, i32 %b)
ret i32 %r
@ -43,9 +43,9 @@ define i32 @uninstrumented(i32 %a, i32 %b) {
}
define i32 @call_uninstrumented(i32 %a, i32 %b) {
; CHECK: @call_uninstrumented.dfsan
; CHECK-LABEL: @call_uninstrumented.dfsan
; CHECK: %r = call i32 @uninstrumented(i32 %a, i32 %b)
; CHECK: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %r
%r = call i32 @uninstrumented(i32 %a, i32 %b)
@ -57,12 +57,12 @@ define i32 @g(i32 %a, i32 %b) {
ret i32 %c
}
@discardg = alias i32 (i32, i32), i32 (i32, i32)* @g
@discardg = alias i32 (i32, i32), ptr @g
define i32 @call_discardg(i32 %a, i32 %b) {
; CHECK: @call_discardg.dfsan
; CHECK: %r = call i32 @discardg(i32 %a, i32 %b)
; CHECK: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK: ret i32 %r
%r = call i32 @discardg(i32 %a, i32 %b)
@ -87,7 +87,7 @@ define i32 @custom_varg_with_ret(i32 %a, i32 %b, ...) {
ret i32 %c
}
define i32 @custom_cb_with_ret(i32 (i32, i32)* %cb, i32 %a, i32 %b) {
define i32 @custom_cb_with_ret(ptr %cb, i32 %a, i32 %b) {
%r = call i32 %cb(i32 %a, i32 %b)
ret i32 %r
}
@ -97,7 +97,7 @@ define i32 @cb_with_ret(i32 %a, i32 %b) {
ret i32 %c
}
define void @custom_cb_without_ret(void (i32, i32)* %cb, i32 %a, i32 %b) {
define void @custom_cb_without_ret(ptr %cb, i32 %a, i32 %b) {
call void %cb(i32 %a, i32 %b)
ret void
}
@ -106,19 +106,19 @@ define void @cb_without_ret(i32 %a, i32 %b) {
ret void
}
define i32 (i32, i32)* @ret_custom() {
define ptr @ret_custom() {
; CHECK: @ret_custom.dfsan
; CHECK: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
ret i32 (i32, i32)* @custom_with_ret
; CHECK: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
ret ptr @custom_with_ret
}
define void @call_custom_without_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_without_ret.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: call void @__dfso_custom_without_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK-NEXT: ret void
@ -129,16 +129,16 @@ define void @call_custom_without_ret(i32 %a, i32 %b) {
define i32 @call_custom_with_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_with_ret.dfsan
; CHECK: %originreturn = alloca i32, align 4
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: {{.*}} = call i32 @__dfso_custom_with_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], i32* %originreturn)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, i32* %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: {{.*}} = call i32 @__dfso_custom_with_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], ptr %originreturn)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, ptr %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], ptr @__dfsan_retval_tls, align 2
; CHECK: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
%r = call i32 @custom_with_ret(i32 %a, i32 %b)
ret i32 %r
@ -147,18 +147,18 @@ define i32 @call_custom_with_ret(i32 %a, i32 %b) {
define void @call_custom_varg_without_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_varg_without_ret.dfsan
; CHECK: %originva = alloca [1 x i32], align 4
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %labelva = alloca [1 x i[[#SBITS]]], align [[#SBYTES]]
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: store i[[#SBITS]] [[AS]], i[[#SBITS]]* [[VS0]], align [[#SBYTES]]
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], [1 x i32]* %originva, i32 0, i32 0
; CHECK: store i32 [[AO]], i32* [[VO0]], align 4
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], [1 x i32]* %originva, i32 0, i32 0
; CHECK: call void (i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i32, i32, i32*, ...) @__dfso_custom_varg_without_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* [[VS0]], i32 zeroext [[AO]], i32 zeroext [[BO]], i32* [[VO0]], i32 %a)
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: store i[[#SBITS]] [[AS]], ptr [[VS0]], align [[#SBYTES]]
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], ptr %originva, i32 0, i32 0
; CHECK: store i32 [[AO]], ptr [[VO0]], align 4
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], ptr %originva, i32 0, i32 0
; CHECK: call void (i32, i32, i[[#SBITS]], i[[#SBITS]], ptr, i32, i32, ptr, ...) @__dfso_custom_varg_without_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr [[VS0]], i32 zeroext [[AO]], i32 zeroext [[BO]], ptr [[VO0]], i32 %a)
; CHECK-NEXT: ret void
call void (i32, i32, ...) @custom_varg_without_ret(i32 %a, i32 %b, i32 %a)
@ -169,23 +169,23 @@ define i32 @call_custom_varg_with_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_varg_with_ret.dfsan
; CHECK: %originreturn = alloca i32, align 4
; CHECK: %originva = alloca [1 x i32], align 4
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: %labelva = alloca [1 x i[[#SBITS]]], align [[#SBYTES]]
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: store i[[#SBITS]] [[BS]], i[[#SBITS]]* [[VS0]], align [[#SBYTES]]
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], [1 x i[[#SBITS]]]* %labelva, i32 0, i32 0
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], [1 x i32]* %originva, i32 0, i32 0
; CHECK: store i32 [[BO]], i32* [[VO0]], align 4
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], [1 x i32]* %originva, i32 0, i32 0
; CHECK: {{.*}} = call i32 (i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i[[#SBITS]]*, i32, i32, i32*, i32*, ...) @__dfso_custom_varg_with_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* [[VS0]], i[[#SBITS]]* %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], i32* [[VO0]], i32* %originreturn, i32 %b)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, i32* %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: store i[[#SBITS]] [[BS]], ptr [[VS0]], align [[#SBYTES]]
; CHECK: [[VS0:%.*]] = getelementptr inbounds [1 x i[[#SBITS]]], ptr %labelva, i32 0, i32 0
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], ptr %originva, i32 0, i32 0
; CHECK: store i32 [[BO]], ptr [[VO0]], align 4
; CHECK: [[VO0:%.*]] = getelementptr inbounds [1 x i32], ptr %originva, i32 0, i32 0
; CHECK: {{.*}} = call i32 (i32, i32, i[[#SBITS]], i[[#SBITS]], ptr, ptr, i32, i32, ptr, ptr, ...) @__dfso_custom_varg_with_ret(i32 %a, i32 %b, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr [[VS0]], ptr %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], ptr [[VO0]], ptr %originreturn, i32 %b)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, ptr %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], ptr @__dfsan_retval_tls, align 2
; CHECK: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
%r = call i32 (i32, i32, ...) @custom_varg_with_ret(i32 %a, i32 %b, i32 %b)
ret i32 %r
@ -194,104 +194,104 @@ define i32 @call_custom_varg_with_ret(i32 %a, i32 %b) {
define i32 @call_custom_cb_with_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_cb_with_ret.dfsan
; CHECK: %originreturn = alloca i32, align 4
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: {{.*}} = call i32 @__dfso_custom_cb_with_ret(i32 (i32, i32)* @cb_with_ret.dfsan, i32 %a, i32 %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* %labelreturn, i32 zeroext 0, i32 zeroext [[AO]], i32 zeroext [[BO]], i32* %originreturn)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, i32* %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: {{.*}} = call i32 @__dfso_custom_cb_with_ret(ptr @cb_with_ret.dfsan, i32 %a, i32 %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr %labelreturn, i32 zeroext 0, i32 zeroext [[AO]], i32 zeroext [[BO]], ptr %originreturn)
; CHECK: [[RS:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK: [[RO:%.*]] = load i32, ptr %originreturn, align 4
; CHECK: store i[[#SBITS]] [[RS]], ptr @__dfsan_retval_tls, align 2
; CHECK: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
%r = call i32 @custom_cb_with_ret(i32 (i32, i32)* @cb_with_ret, i32 %a, i32 %b)
%r = call i32 @custom_cb_with_ret(ptr @cb_with_ret, i32 %a, i32 %b)
ret i32 %r
}
define void @call_custom_cb_without_ret(i32 %a, i32 %b) {
; CHECK: @call_custom_cb_without_ret.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: call void @__dfso_custom_cb_without_ret(void (i32, i32)* @cb_without_ret.dfsan, i32 %a, i32 %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext 0, i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK-LABEL: @call_custom_cb_without_ret.dfsan
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK: call void @__dfso_custom_cb_without_ret(ptr @cb_without_ret.dfsan, i32 %a, i32 %b, i[[#SBITS]] zeroext 0, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext 0, i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK-NEXT: ret void
call void @custom_cb_without_ret(void (i32, i32)* @cb_without_ret, i32 %a, i32 %b)
call void @custom_cb_without_ret(ptr @cb_without_ret, i32 %a, i32 %b)
ret void
}
; CHECK: define i32 @discardg(i32 %0, i32 %1)
; CHECK: [[R:%.*]] = call i32 @g.dfsan
; CHECK-NEXT: %_dfsret = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: %_dfsret_o = load i32, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %_dfsret = load i[[#SBITS]], ptr @__dfsan_retval_tls, align 2
; CHECK-NEXT: %_dfsret_o = load i32, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32 [[R]]
; CHECK: define linkonce_odr void @"dfso$custom_without_ret"(i32 %0, i32 %1)
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK-NEXT: call void @__dfso_custom_without_ret(i32 %0, i32 %1, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK-NEXT: ret void
; CHECK: define linkonce_odr i32 @"dfso$custom_with_ret"(i32 %0, i32 %1)
; CHECK: %originreturn = alloca i32, align 4
; CHECK-NEXT: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[R:%.*]] = call i32 @__dfso_custom_with_ret(i32 %0, i32 %1, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], i32* %originreturn)
; CHECK-NEXT: [[RS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK-NEXT: [[RO:%.*]] = load i32, i32* %originreturn, align 4
; CHECK-NEXT: store i[[#SBITS]] [[RS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK-NEXT: [[R:%.*]] = call i32 @__dfso_custom_with_ret(i32 %0, i32 %1, i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr %labelreturn, i32 zeroext [[AO]], i32 zeroext [[BO]], ptr %originreturn)
; CHECK-NEXT: [[RS:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK-NEXT: [[RO:%.*]] = load i32, ptr %originreturn, align 4
; CHECK-NEXT: store i[[#SBITS]] [[RS]], ptr @__dfsan_retval_tls, align 2
; CHECK-NEXT: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32 [[R]]
; CHECK: define linkonce_odr void @"dfso$custom_varg_without_ret"(i32 %0, i32 %1, ...)
; CHECK: call void @__dfsan_vararg_wrapper(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @0, i32 0, i32 0))
; CHECK: call void @__dfsan_vararg_wrapper(ptr @0)
; CHECK-NEXT: unreachable
; CHECK: define linkonce_odr i32 @"dfso$custom_varg_with_ret"(i32 %0, i32 %1, ...)
; CHECK: call void @__dfsan_vararg_wrapper(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @1, i32 0, i32 0))
; CHECK: call void @__dfsan_vararg_wrapper(ptr @1)
; CHECK-NEXT: unreachable
; CHECK: define linkonce_odr i32 @"dfso$custom_cb_with_ret"(i32 (i32, i32)* %0, i32 %1, i32 %2)
; CHECK: define linkonce_odr i32 @"dfso$custom_cb_with_ret"(ptr %0, i32 %1, i32 %2)
; CHECK: %originreturn = alloca i32, align 4
; CHECK-NEXT: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[CO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[CO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: %labelreturn = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 4) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[CS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[R:%.*]] = call i32 @__dfso_custom_cb_with_ret(i32 (i32, i32)* %0, i32 %1, i32 %2, i[[#SBITS]] zeroext [[CS]], i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i[[#SBITS]]* %labelreturn, i32 zeroext [[CO]], i32 zeroext [[AO]], i32 zeroext [[BO]], i32* %originreturn)
; CHECK-NEXT: [[RS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* %labelreturn, align [[#SBYTES]]
; CHECK-NEXT: [[RO:%.*]] = load i32, i32* %originreturn, align 4
; CHECK-NEXT: store i[[#SBITS]] [[RS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: store i32 [[RO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 4) to ptr), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK-NEXT: [[CS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK-NEXT: [[R:%.*]] = call i32 @__dfso_custom_cb_with_ret(ptr %0, i32 %1, i32 %2, i[[#SBITS]] zeroext [[CS]], i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], ptr %labelreturn, i32 zeroext [[CO]], i32 zeroext [[AO]], i32 zeroext [[BO]], ptr %originreturn)
; CHECK-NEXT: [[RS:%.*]] = load i[[#SBITS]], ptr %labelreturn, align [[#SBYTES]]
; CHECK-NEXT: [[RO:%.*]] = load i32, ptr %originreturn, align 4
; CHECK-NEXT: store i[[#SBITS]] [[RS]], ptr @__dfsan_retval_tls, align 2
; CHECK-NEXT: store i32 [[RO]], ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret i32 [[R]]
; CHECK: define linkonce_odr void @"dfso$custom_cb_without_ret"(void (i32, i32)* %0, i32 %1, i32 %2)
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[CO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 4) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK-NEXT: [[CS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: call void @__dfso_custom_cb_without_ret(void (i32, i32)* %0, i32 %1, i32 %2, i[[#SBITS]] zeroext [[CS]], i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext [[CO]], i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK: define linkonce_odr void @"dfso$custom_cb_without_ret"(ptr %0, i32 %1, i32 %2)
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK-NEXT: [[AO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: [[CO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 4) to ptr), align 2
; CHECK-NEXT: [[AS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK-NEXT: [[CS:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
; CHECK-NEXT: call void @__dfso_custom_cb_without_ret(ptr %0, i32 %1, i32 %2, i[[#SBITS]] zeroext [[CS]], i[[#SBITS]] zeroext [[AS]], i[[#SBITS]] zeroext [[BS]], i32 zeroext [[CO]], i32 zeroext [[AO]], i32 zeroext [[BO]])
; CHECK-NEXT: ret void
; CHECK: declare void @__dfso_custom_without_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], i32, i32)
; CHECK: declare i32 @__dfso_custom_with_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i32, i32, i32*)
; CHECK: declare i32 @__dfso_custom_with_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], ptr, i32, i32, ptr)
; CHECK: declare i32 @__dfso_custom_cb_with_ret(i32 (i32, i32)*, i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i32, i32, i32, i32*)
; CHECK: declare i32 @__dfso_custom_cb_with_ret(ptr, i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], ptr, i32, i32, i32, ptr)
; CHECK: declare void @__dfso_custom_cb_without_ret(void (i32, i32)*, i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i32, i32, i32)
; CHECK: declare void @__dfso_custom_cb_without_ret(ptr, i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]], i32, i32, i32)
; CHECK: declare void @__dfso_custom_varg_without_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i32, i32, i32*, ...)
; CHECK: declare void @__dfso_custom_varg_without_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], ptr, i32, i32, ptr, ...)
; CHECK: declare i32 @__dfso_custom_varg_with_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], i[[#SBITS]]*, i[[#SBITS]]*, i32, i32, i32*, i32*, ...)
; CHECK: declare i32 @__dfso_custom_varg_with_ret(i32, i32, i[[#SBITS]], i[[#SBITS]], ptr, ptr, i32, i32, ptr, ptr, ...)

245
llvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
View File

@ -6,14 +6,14 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define {} @load0({}* %p) {
define {} @load0(ptr %p) {
; CHECK-LABEL: @load0.dfsan
; CHECK-NEXT: %a = load {}, {}* %p, align 1
; CHECK-NEXT: store {} zeroinitializer, {}* bitcast ([100 x i64]* @__dfsan_retval_tls to {}*), align [[ALIGN:2]]
; CHECK-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load {}, ptr %p, align 1
; CHECK-NEXT: store {} zeroinitializer, ptr @__dfsan_retval_tls, align [[ALIGN:2]]
; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: ret {} %a
%a = load {}, {}* %p
%a = load {}, ptr %p
ret {} %a
}
@ -21,121 +21,120 @@ define i16 @load_non_escaped_alloca() {
; CHECK-LABEL: @load_non_escaped_alloca.dfsan
; CHECK-NEXT: %[[#S_ALLOCA:]] = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK-NEXT: %_dfsa = alloca i32, align 4
; CHECK: %[[#SHADOW:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#S_ALLOCA]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN:]] = load i32, i32* %_dfsa, align 4
; CHECK-NEXT: %a = load i16, i16* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: %[[#SHADOW:]] = load i[[#SBITS]], ptr %[[#S_ALLOCA]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN:]] = load i32, ptr %_dfsa, align 4
; CHECK-NEXT: %a = load i16, ptr %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4
%p = alloca i16
%a = load i16, i16* %p
%a = load i16, ptr %p
ret i16 %a
}
define i16* @load_escaped_alloca() {
define ptr @load_escaped_alloca() {
; CHECK-LABEL: @load_escaped_alloca.dfsan
; CHECK: %[[#INTP:]] = ptrtoint i16* %p to i64
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#%.10d,ORIGIN_BASE:]]
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: {{%.*}} = load i32, i32* %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR0]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR0]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR1]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: {{%.*}} = load i32, ptr %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i[[#SBITS]], ptr %[[#SHADOW_PTR0]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR0]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR1]], align [[#SBYTES]]
; CHECK-NEXT: {{%.*}} = or i[[#SBITS]] %[[#SHADOW]], %[[#SHADOW+1]]
; CHECK-NEXT: %a = load i16, i16* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i16, ptr %p, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
%p = alloca i16
%a = load i16, i16* %p
ret i16* %p
%a = load i16, ptr %p
ret ptr %p
}
@X = constant i1 1
define i1 @load_global() {
; CHECK-LABEL: @load_global.dfsan
; CHECK: %a = load i1, i1* @X, align 1
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 0, i32* @__dfsan_retval_origin_tls, align 4
; CHECK: %a = load i1, ptr @X, align 1
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 0, ptr @__dfsan_retval_origin_tls, align 4
%a = load i1, i1* @X
%a = load i1, ptr @X
ret i1 %a
}
define i1 @load1(i1* %p) {
define i1 @load1(ptr %p) {
; CHECK-LABEL: @load1.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i1* %p to i64
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; COMBINE_LOAD_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK-NEXT: %a = load i1, i1* %p, align 1
; CHECK-NEXT: store i[[#SBITS]] %[[#AS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i1, ptr %p, align 1
; CHECK-NEXT: store i[[#SBITS]] %[[#AS]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i1, i1* %p
%a = load i1, ptr %p
ret i1 %a
}
define i16 @load16(i1 %i, i16* %p) {
define i16 @load16(i1 %i, ptr %p) {
; CHECK-LABEL: @load16.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i16* %p to i64
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR0]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR0]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], i[[#SBITS]]* %[[#SHADOW_PTR1]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#SHADOW_PTR1:]] = getelementptr i[[#SBITS]], ptr %[[#SHADOW_PTR0]], i64 1
; CHECK-NEXT: %[[#SHADOW:]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR0]], align [[#SBYTES]]
; CHECK-NEXT: %[[#SHADOW+1]] = load i[[#SBITS]], ptr %[[#SHADOW_PTR1]], align [[#SBYTES]]
; CHECK-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#SHADOW]], %[[#SHADOW+1]]
; COMBINE_LOAD_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK-NEXT: %a = load i16, i16* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#AS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i16, ptr %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#AS]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i16, i16* %p
%a = load i16, ptr %p
ret i16 %a
}
define i32 @load32(i32* %p) {
define i32 @load32(ptr %p) {
; CHECK-LABEL: @load32.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i32* %p to i64
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#AO:]] = load i32, i32* %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i[[#WSBITS:mul(SBITS,4)]]*
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i[[#WSBITS]], i[[#WSBITS]]* %[[#WIDE_SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: %[[#AO:]] = load i32, ptr %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i[[#WSBITS:mul(SBITS,4)]], ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW+1]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW]], [[#mul(SBITS,2)]]
; CHECK-NEXT: %[[#WIDE_SHADOW+2]] = or i[[#WSBITS]] %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW+1]]
; CHECK-NEXT: %[[#WIDE_SHADOW+3]] = lshr i[[#WSBITS]] %[[#WIDE_SHADOW+2]], [[#SBITS]]
@ -146,31 +145,30 @@ define i32 @load32(i32* %p) {
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#AO:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#AO]]
; CHECK-NEXT: %a = load i32, i32* %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i32, ptr %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#AO]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i32, i32* %p
%a = load i32, ptr %p
ret i32 %a
}
define i64 @load64(i64* %p) {
define i64 @load64(ptr %p) {
; CHECK-LABEL: @load64.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i64* %p to i64
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#ORIGIN:]] = load i32, i32* %[[#ORIGIN_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i64*
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, i64* %[[#WIDE_SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: %[[#ORIGIN:]] = load i32, ptr %[[#ORIGIN_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = load i64, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW_LO:]] = shl i64 %[[#WIDE_SHADOW]], 32
; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, i32* %[[#ORIGIN_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, i32* %[[#ORIGIN2_PTR]], align 8
; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, ptr %[[#ORIGIN_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, ptr %[[#ORIGIN2_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 16
@ -187,22 +185,21 @@ define i64 @load64(i64* %p) {
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]
; CHECK-NEXT: %a = load i64, i64* %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], i32* @__dfsan_retval_origin_tls, align 4
%a = load i64, i64* %p
; CHECK-NEXT: %a = load i64, ptr %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i64, ptr %p
ret i64 %a
}
define i64 @load64_align2(i64* %p) {
define i64 @load64_align2(ptr %p) {
; CHECK-LABEL: @load64_align2.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = bitcast i64* %p to i8*
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(i8* %[[#INTP]], i64 8)
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(ptr %p, i64 8)
; CHECK-NEXT: %[[#LABEL_ORIGIN+1]] = lshr i64 %[[#LABEL_ORIGIN]], 32
; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN+1]] to i[[#SBITS]]
; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32
@ -211,39 +208,38 @@ define i64 @load64_align2(i64* %p) {
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]
; CHECK-NEXT: %a = load i64, i64* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i64, ptr %p, align 2
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i64, i64* %p, align 2
%a = load i64, ptr %p, align 2
ret i64 %a
}
define i128 @load128(i128* %p) {
define i128 @load128(ptr %p) {
; CHECK-LABEL: @load128.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = ptrtoint i128* %p to i64
; CHECK-NEXT: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#MASK]]
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = add i64 %[[#SHADOW_OFFSET]], [[#ORIGIN_BASE]]
; CHECK-NEXT: %[[#ORIGIN1_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#ORIGIN1:]] = load i32, i32* %[[#ORIGIN1_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW1_PTR:]] = bitcast i[[#SBITS]]* %[[#SHADOW_PTR]] to i64*
; CHECK-NEXT: %[[#WIDE_SHADOW1:]] = load i64, i64* %[[#WIDE_SHADOW1_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN1_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK-NEXT: %[[#ORIGIN1:]] = load i32, ptr %[[#ORIGIN1_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW1:]] = load i64, ptr %[[#SHADOW_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW1_LO:]] = shl i64 %[[#WIDE_SHADOW1]], 32
; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, i32* %[[#ORIGIN1_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, i32* %[[#ORIGIN2_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW2_PTR:]] = getelementptr i64, i64* %[[#WIDE_SHADOW1_PTR]], i64 1
; CHECK-NEXT: %[[#WIDE_SHADOW2:]] = load i64, i64* %[[#WIDE_SHADOW2_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#ORIGIN2_PTR:]] = getelementptr i32, ptr %[[#ORIGIN1_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN2:]] = load i32, ptr %[[#ORIGIN2_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW2_PTR:]] = getelementptr i64, ptr %[[#SHADOW_PTR]], i64 1
; CHECK-NEXT: %[[#WIDE_SHADOW2:]] = load i64, ptr %[[#WIDE_SHADOW2_PTR]], align [[#SBYTES]]
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW1]], %[[#WIDE_SHADOW2]]
; CHECK-NEXT: %[[#ORIGIN3_PTR:]] = getelementptr i32, i32* %[[#ORIGIN2_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN3:]] = load i32, i32* %[[#ORIGIN3_PTR]], align 8
; CHECK-NEXT: %[[#ORIGIN3_PTR:]] = getelementptr i32, ptr %[[#ORIGIN2_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN3:]] = load i32, ptr %[[#ORIGIN3_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW2_LO:]] = shl i64 %[[#WIDE_SHADOW2]], 32
; CHECK-NEXT: %[[#ORIGIN4_PTR:]] = getelementptr i32, i32* %[[#ORIGIN3_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN4:]] = load i32, i32* %[[#ORIGIN4_PTR]], align 8
; CHECK-NEXT: %[[#ORIGIN4_PTR:]] = getelementptr i32, ptr %[[#ORIGIN3_PTR]], i64 1
; CHECK-NEXT: %[[#ORIGIN4:]] = load i32, ptr %[[#ORIGIN4_PTR]], align 8
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 32
; CHECK-NEXT: %[[#WIDE_SHADOW:]] = or i64 %[[#WIDE_SHADOW]], %[[#WIDE_SHADOW_SHIFTED]]
; CHECK-NEXT: %[[#WIDE_SHADOW_SHIFTED:]] = lshr i64 %[[#WIDE_SHADOW]], 16
@ -262,22 +258,21 @@ define i128 @load128(i128* %p) {
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]
; CHECK-NEXT: %a = load i128, i128* %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], i32* @__dfsan_retval_origin_tls, align 4
%a = load i128, i128* %p
; CHECK-NEXT: %a = load i128, ptr %p, align 8
; CHECK-NEXT: store i[[#SBITS]] %[[#SHADOW]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i128, ptr %p
ret i128 %a
}
define i17 @load17(i17* %p) {
define i17 @load17(ptr %p) {
; CHECK-LABEL: @load17.dfsan
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_LOAD_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_LOAD_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#INTP:]] = bitcast i17* %p to i8*
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(i8* %[[#INTP]], i64 3)
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(ptr %p, i64 3)
; CHECK-NEXT: %[[#LABEL_ORIGIN_H32:]] = lshr i64 %[[#LABEL_ORIGIN]], 32
; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN_H32]] to i[[#SBITS]]
; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32
@ -286,10 +281,10 @@ define i17 @load17(i17* %p) {
; COMBINE_LOAD_PTR-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; COMBINE_LOAD_PTR-NEXT: %[[#ORIGIN:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN]]
; CHECK-NEXT: %a = load i17, i17* %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i17, ptr %p, align 4
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i17, i17* %p, align 4
%a = load i17, ptr %p, align 4
ret i17 %a
}

36
llvm/test/Instrumentation/DataFlowSanitizer/origin_mem_intrinsic.ll
View File

@ -5,37 +5,37 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1)
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1)
declare void @llvm.memcpy.p0.p0.i32(ptr, ptr, i32, i1)
declare void @llvm.memmove.p0.p0.i32(ptr, ptr, i32, i1)
declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1)
define void @memcpy(i8* %d, i8* %s, i32 %l) {
define void @memcpy(ptr %d, ptr %s, i32 %l) {
; CHECK: @memcpy.dfsan
; CHECK: [[L64:%.*]] = zext i32 %l to i64
; CHECK: call void @__dfsan_mem_origin_transfer(i8* %d, i8* %s, i64 [[L64]])
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align [[#SBYTES]] {{.*}}, i8* align [[#SBYTES]] {{.*}}, i32 {{.*}}, i1 false)
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %d, i8* %s, i32 %l, i1 false)
; CHECK: call void @__dfsan_mem_origin_transfer(ptr %d, ptr %s, i64 [[L64]])
; CHECK: call void @llvm.memcpy.p0.p0.i32(ptr align [[#SBYTES]] {{.*}}, ptr align [[#SBYTES]] {{.*}}, i32 {{.*}}, i1 false)
; CHECK: call void @llvm.memcpy.p0.p0.i32(ptr %d, ptr %s, i32 %l, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %d, i8* %s, i32 %l, i1 0)
call void @llvm.memcpy.p0.p0.i32(ptr %d, ptr %s, i32 %l, i1 0)
ret void
}
define void @memmove(i8* %d, i8* %s, i32 %l) {
define void @memmove(ptr %d, ptr %s, i32 %l) {
; CHECK: @memmove.dfsan
; CHECK: [[L64:%.*]] = zext i32 %l to i64
; CHECK: call void @__dfsan_mem_origin_transfer(i8* %d, i8* %s, i64 [[L64]])
; CHECK: call void @llvm.memmove.p0i8.p0i8.i32(i8* align [[#SBYTES]] {{.*}}, i8* align [[#SBYTES]] {{.*}}, i32 {{.*}}, i1 false)
; CHECK: call void @llvm.memmove.p0i8.p0i8.i32(i8* %d, i8* %s, i32 %l, i1 false)
; CHECK: call void @__dfsan_mem_origin_transfer(ptr %d, ptr %s, i64 [[L64]])
; CHECK: call void @llvm.memmove.p0.p0.i32(ptr align [[#SBYTES]] {{.*}}, ptr align [[#SBYTES]] {{.*}}, i32 {{.*}}, i1 false)
; CHECK: call void @llvm.memmove.p0.p0.i32(ptr %d, ptr %s, i32 %l, i1 false)
call void @llvm.memmove.p0i8.p0i8.i32(i8* %d, i8* %s, i32 %l, i1 0)
call void @llvm.memmove.p0.p0.i32(ptr %d, ptr %s, i32 %l, i1 0)
ret void
}
define void @memset(i8* %p, i8 %v) {
define void @memset(ptr %p, i8 %v) {
; CHECK: @memset.dfsan
; CHECK: [[O:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[S:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK: call void @__dfsan_set_label(i[[#SBITS]] [[S]], i32 [[O]], i8* %p, i64 1)
call void @llvm.memset.p0i8.i64(i8* %p, i8 %v, i64 1, i1 1)
; CHECK: [[O:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[S:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN:2]]
; CHECK: call void @__dfsan_set_label(i[[#SBITS]] [[S]], i32 [[O]], ptr %p, i64 1)
call void @llvm.memset.p0.i64(ptr %p, i8 %v, i64 1, i1 1)
ret void
}

90
llvm/test/Instrumentation/DataFlowSanitizer/origin_other_ops.ll
View File

@ -9,8 +9,8 @@ target triple = "x86_64-unknown-linux-gnu"
define float @unop(float %f) {
; CHECK: @unop.dfsan
; CHECK: [[FO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: store i32 [[FO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[FO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: store i32 [[FO]], ptr @__dfsan_retval_origin_tls, align 4
%r = fneg float %f
ret float %r
@ -18,68 +18,68 @@ define float @unop(float %f) {
define i1 @binop(i1 %a, i1 %b) {
; CHECK: @binop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[MO:%.*]] = select i1 [[NE]], i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[MO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[MO]], ptr @__dfsan_retval_origin_tls, align 4
%r = add i1 %a, %b
ret i1 %r
}
define i8 @castop(i32* %p) {
define i8 @castop(ptr %p) {
; CHECK: @castop.dfsan
; CHECK: [[PO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: store i32 [[PO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[PO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: store i32 [[PO]], ptr @__dfsan_retval_origin_tls, align 4
%r = ptrtoint i32* %p to i8
%r = ptrtoint ptr %p to i8
ret i8 %r
}
define i1 @cmpop(i1 %a, i1 %b) {
; CHECK: @cmpop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[MO:%.*]] = select i1 [[NE]], i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[MO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[MO]], ptr @__dfsan_retval_origin_tls, align 4
%r = icmp eq i1 %a, %b
ret i1 %r
}
define i32* @gepop([10 x [20 x i32]]* %p, i32 %a, i32 %b, i32 %c) {
define ptr @gepop(ptr %p, i32 %a, i32 %b, i32 %c) {
; CHECK: @gepop.dfsan
; CHECK: [[CO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 3), align 4
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[PO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[CS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 6) to i[[#SBITS]]*), align 2
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 4) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[CO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 3), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK: [[AO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[PO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[CS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 6) to ptr), align 2
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 4) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS_NE:%.*]] = icmp ne i[[#SBITS]] [[AS]], 0
; CHECK: [[APO:%.*]] = select i1 [[AS_NE]], i32 [[AO]], i32 [[PO]]
; CHECK: [[BS_NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[ABPO:%.*]] = select i1 [[BS_NE]], i32 [[BO]], i32 [[APO]]
; CHECK: [[CS_NE:%.*]] = icmp ne i[[#SBITS]] [[CS]], 0
; CHECK: [[ABCPO:%.*]] = select i1 [[CS_NE]], i32 [[CO]], i32 [[ABPO]]
; CHECK: store i32 [[ABCPO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[ABCPO]], ptr @__dfsan_retval_origin_tls, align 4
%e = getelementptr [10 x [20 x i32]], [10 x [20 x i32]]* %p, i32 %a, i32 %b, i32 %c
ret i32* %e
%e = getelementptr [10 x [20 x i32]], ptr %p, i32 %a, i32 %b, i32 %c
ret ptr %e
}
define i32 @eeop(<4 x i32> %a, i32 %b) {
; CHECK: @eeop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[MO:%.*]] = select i1 [[NE]], i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[MO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[MO]], ptr @__dfsan_retval_origin_tls, align 4
%e = extractelement <4 x i32> %a, i32 %b
ret i32 %e
@ -87,16 +87,16 @@ define i32 @eeop(<4 x i32> %a, i32 %b) {
define <4 x i32> @ieop(<4 x i32> %p, i32 %a, i32 %b) {
; CHECK: @ieop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[PO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 4) to i[[#SBITS]]*), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 2), align 4
; CHECK: [[AO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[PO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 4) to ptr), align 2
; CHECK: [[AS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS_NE:%.*]] = icmp ne i[[#SBITS]] [[AS]], 0
; CHECK: [[APO:%.*]] = select i1 [[AS_NE]], i32 [[AO]], i32 [[PO]]
; CHECK: [[BS_NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[ABPO:%.*]] = select i1 [[BS_NE]], i32 [[BO]], i32 [[APO]]
; CHECK: store i32 [[ABPO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[ABPO]], ptr @__dfsan_retval_origin_tls, align 4
%e = insertelement <4 x i32> %p, i32 %a, i32 %b
ret <4 x i32> %e
@ -104,12 +104,12 @@ define <4 x i32> @ieop(<4 x i32> %p, i32 %a, i32 %b) {
define <4 x i32> @svop(<4 x i32> %a, <4 x i32> %b) {
; CHECK: @svop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align 2
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: [[BS:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[NE:%.*]] = icmp ne i[[#SBITS]] [[BS]], 0
; CHECK: [[MO:%.*]] = select i1 [[NE]], i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[MO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[MO]], ptr @__dfsan_retval_origin_tls, align 4
%e = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
ret <4 x i32> %e
@ -117,8 +117,8 @@ define <4 x i32> @svop(<4 x i32> %a, <4 x i32> %b) {
define i32 @evop({i32, float} %a) {
; CHECK: @evop.dfsan
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: store i32 [[AO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: store i32 [[AO]], ptr @__dfsan_retval_origin_tls, align 4
%e = extractvalue {i32, float} %a, 0
ret i32 %e
@ -126,17 +126,17 @@ define i32 @evop({i32, float} %a) {
define {i32, {float, float}} @ivop({i32, {float, float}} %a, {float, float} %b) {
; CHECK: @ivop.dfsan
; CHECK: [[BO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: [[BO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AO:%.*]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMM: TODO simplify the expression [[#mul(2,SBYTES) + max(SBYTES,2)]] to
; COMM: [[#mul(3,SBYTES)]], if shadow-tls-alignment is updated to match shadow
; CHECK: [[BS:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES) + max(SBYTES,2)]]) to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; CHECK: [[BS:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2,SBYTES) + max(SBYTES,2)]]) to ptr), align 2
; CHECK: [[BS0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[BS]], 0
; CHECK: [[BS1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[BS]], 1
; CHECK: [[BS01:%.*]] = or i[[#SBITS]] [[BS0]], [[BS1]]
; CHECK: [[NE:%.*]] = icmp ne i[[#SBITS]] [[BS01]], 0
; CHECK: [[MO:%.*]] = select i1 [[NE]], i32 [[BO]], i32 [[AO]]
; CHECK: store i32 [[MO]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK: store i32 [[MO]], ptr @__dfsan_retval_origin_tls, align 4
%e = insertvalue {i32, {float, float}} %a, {float, float} %b, 1
ret {i32, {float, float}} %e

115
llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll
View File

@ -11,75 +11,74 @@ define void @store_zero_to_non_escaped_alloca() {
; CHECK-NEXT: [[A:%.*]] = alloca i[[#SBITS]], align [[#SBYTES]]
; CHECK-NEXT: %_dfsa = alloca i32, align 4
; CHECK-NEXT: %p = alloca i16, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* [[A]], align [[#SBYTES]]
; CHECK-NEXT: store i16 1, i16* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, ptr [[A]], align [[#SBYTES]]
; CHECK-NEXT: store i16 1, ptr %p, align 2
; CHECK-NEXT: ret void
%p = alloca i16
store i16 1, i16* %p
store i16 1, ptr %p
ret void
}
define void @store_nonzero_to_non_escaped_alloca(i16 %a) {
; CHECK-LABEL: @store_nonzero_to_non_escaped_alloca.dfsan
; CHECK: %[[#AO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK: %[[#AO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK: %_dfsa = alloca i32, align 4
; CHECK: store i32 %[[#AO]], i32* %_dfsa, align 4
; CHECK: store i32 %[[#AO]], ptr %_dfsa, align 4
%p = alloca i16
store i16 %a, i16* %p
store i16 %a, ptr %p
ret void
}
declare void @foo(i16* %p)
declare void @foo(ptr %p)
define void @store_zero_to_escaped_alloca() {
; CHECK-LABEL: @store_zero_to_escaped_alloca.dfsan
; CHECK: %[[#SA:]] = bitcast i[[#SBITS]]* {{.*}} to i[[#NUM_BITS:mul(SBITS,2)]]*
; CHECK-NEXT: store i[[#NUM_BITS]] 0, i[[#NUM_BITS]]* %[[#SA]], align [[#SBYTES]]
; CHECK-NEXT: store i16 1, i16* %p, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: call void @foo.dfsan(i16* %p)
; CHECK: store i[[#NUM_BITS:mul(SBITS,2)]] 0, ptr {{.*}}, align [[#SBYTES]]
; CHECK-NEXT: store i16 1, ptr %p, align 2
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; CHECK-NEXT: call void @foo.dfsan(ptr %p)
%p = alloca i16
store i16 1, i16* %p
call void @foo(i16* %p)
store i16 1, ptr %p
call void @foo(ptr %p)
ret void
}
define void @store_nonzero_to_escaped_alloca(i16 %a) {
; CHECK-LABEL: @store_nonzero_to_escaped_alloca.dfsan
; CHECK-NEXT: %[[#AO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK: %[[#INTP:]] = ptrtoint i16* %p to i64
; CHECK-NEXT: %[[#AO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: %[[#INTP:]] = ptrtoint ptr %p to i64
; CHECK-NEXT: %[[#SHADOW_OFFSET:]] = xor i64 %[[#INTP]], [[#%.10d,MASK:]]
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to i[[#SBITS]]*
; CHECK-NEXT: %[[#SHADOW_PTR0:]] = inttoptr i64 %[[#SHADOW_OFFSET]] to ptr
; CHECK-NEXT: %[[#ORIGIN_OFFSET:]] = add i64 %[[#SHADOW_OFFSET]], [[#%.10d,ORIGIN_BASE:]]
; CHECK-NEXT: %[[#ORIGIN_ADDR:]] = and i64 %[[#ORIGIN_OFFSET]], -4
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to i32*
; CHECK-NEXT: %[[#ORIGIN_PTR:]] = inttoptr i64 %[[#ORIGIN_ADDR]] to ptr
; CHECK: %_dfscmp = icmp ne i[[#SBITS]] %[[#AS]], 0
; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
; CHECK: [[L1]]:
; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#ORIGIN_PTR]], align 4
; CHECK-NEXT: br label %[[L2]]
; CHECK: [[L2]]:
; CHECK-NEXT: store i16 %a, i16* %p, align 2
; CHECK-NEXT: store i16 %a, ptr %p, align 2
%p = alloca i16
store i16 %a, i16* %p
call void @foo(i16* %p)
store i16 %a, ptr %p
call void @foo(ptr %p)
ret void
}
define void @store64_align8(i64* %p, i64 %a) {
define void @store64_align8(ptr %p, i64 %a) {
; CHECK-LABEL: @store64_align8.dfsan
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
@ -92,24 +91,23 @@ define void @store64_align8(i64* %p, i64 %a) {
; CHECK-NEXT: %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64
; CHECK-NEXT: %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32
; CHECK-NEXT: %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]]
; CHECK-NEXT: %[[#O_PTR:]] = bitcast i32* {{.*}} to i64*
; CHECK-NEXT: store i64 %[[#NO2]], i64* %[[#O_PTR]], align 8
; CHECK-NEXT: store i64 %[[#NO2]], ptr {{.*}}, align 8
; CHECK-NEXT: br label %[[L2]]
; CHECK: [[L2]]:
; CHECK-NEXT: store i64 %a, i64* %p, align 8
store i64 %a, i64* %p
; CHECK-NEXT: store i64 %a, ptr %p, align 8
store i64 %a, ptr %p
ret void
}
define void @store64_align2(i64* %p, i64 %a) {
define void @store64_align2(ptr %p, i64 %a) {
; CHECK-LABEL: @store64_align2.dfsan
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
@ -119,24 +117,24 @@ define void @store64_align2(i64* %p, i64 %a) {
; CHECK-NEXT: br i1 %_dfscmp, label %[[L1:.*]], label %[[L2:.*]],
; CHECK: [[L1]]:
; CHECK-NEXT: %[[#NO:]] = call i32 @__dfsan_chain_origin(i32 %[[#AO]])
; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR0:]], align 4
; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, i32* %[[#O_PTR0]], i32 1
; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR1]], align 4
; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR0:]], align 4
; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, ptr %[[#O_PTR0]], i32 1
; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR1]], align 4
; CHECK: [[L2]]:
; CHECK-NEXT: store i64 %a, i64* %p, align 2
store i64 %a, i64* %p, align 2
; CHECK-NEXT: store i64 %a, ptr %p, align 2
store i64 %a, ptr %p, align 2
ret void
}
define void @store96_align8(i96* %p, i96 %a) {
define void @store96_align8(ptr %p, i96 %a) {
; CHECK-LABEL: @store96_align8.dfsan
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; COMBINE_STORE_PTR-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#AO:]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK-NEXT: %[[#AS:]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; COMBINE_STORE_PTR-NEXT: %[[#AS:]] = or i[[#SBITS]] %[[#AS]], %[[#PS]]
; COMBINE_STORE_PTR-NEXT: %[[#NE:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
@ -149,13 +147,12 @@ define void @store96_align8(i96* %p, i96 %a) {
; CHECK-NEXT: %[[#NO_ZEXT:]] = zext i32 %[[#NO]] to i64
; CHECK-NEXT: %[[#NO_SHL:]] = shl i64 %[[#NO_ZEXT]], 32
; CHECK-NEXT: %[[#NO2:]] = or i64 %[[#NO_ZEXT]], %[[#NO_SHL]]
; CHECK-NEXT: %[[#O_PTR64:]] = bitcast i32* %[[#O_PTR0:]] to i64*
; CHECK-NEXT: store i64 %[[#NO2]], i64* %[[#O_PTR64]], align 8
; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, i32* %[[#O_PTR0]], i32 2
; CHECK-NEXT: store i32 %[[#NO]], i32* %[[#O_PTR1]], align 8
; CHECK-NEXT: store i64 %[[#NO2]], ptr %[[#O_PTR0:]], align 8
; CHECK-NEXT: %[[#O_PTR1:]] = getelementptr i32, ptr %[[#O_PTR0]], i32 2
; CHECK-NEXT: store i32 %[[#NO]], ptr %[[#O_PTR1]], align 8
; CHECK: [[L2]]:
; CHECK-NEXT: store i96 %a, i96* %p, align 8
store i96 %a, i96* %p, align 8
; CHECK-NEXT: store i96 %a, ptr %p, align 8
store i96 %a, ptr %p, align 8
ret void
}

13
llvm/test/Instrumentation/DataFlowSanitizer/origin_store_threshold.ll
View File

@ -5,17 +5,16 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define void @store_threshold([2 x i64]* %p, [2 x i64] %a) {
define void @store_threshold(ptr %p, [2 x i64] %a) {
; CHECK: @store_threshold.dfsan
; CHECK: [[AO:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AS:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to [2 x i[[#SBITS]]]*), align 2
; CHECK: [[AO:%.*]] = load i32, ptr getelementptr inbounds ([200 x i32], ptr @__dfsan_arg_origin_tls, i64 0, i64 1), align 4
; CHECK: [[AS:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; CHECK: [[AS0:%.*]] = extractvalue [2 x i[[#SBITS]]] [[AS]], 0
; CHECK: [[AS1:%.*]] = extractvalue [2 x i[[#SBITS]]] [[AS]], 1
; CHECK: [[AS01:%.*]] = or i[[#SBITS]] [[AS0]], [[AS1]]
; CHECK: [[ADDR:%.*]] = bitcast [2 x i64]* %p to i8*
; CHECK: call void @__dfsan_maybe_store_origin(i[[#SBITS]] [[AS01]], i8* [[ADDR]], i64 16, i32 [[AO]])
; CHECK: store [2 x i64] %a, [2 x i64]* %p, align 8
; CHECK: call void @__dfsan_maybe_store_origin(i[[#SBITS]] [[AS01]], ptr %p, i64 16, i32 [[AO]])
; CHECK: store [2 x i64] %a, ptr %p, align 8
store [2 x i64] %a, [2 x i64]* %p
store [2 x i64] %a, ptr %p
ret void
}

17
llvm/test/Instrumentation/DataFlowSanitizer/origin_track_load.ll
View File

@ -5,14 +5,13 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define i64 @load64(i64* %p) {
define i64 @load64(ptr %p) {
; CHECK-LABEL: @load64.dfsan
; CHECK-NEXT: %[[#PO:]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__dfsan_arg_origin_tls, i64 0, i64 0), align 4
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: %[[#PO:]] = load i32, ptr @__dfsan_arg_origin_tls, align 4
; CHECK-NEXT: %[[#PS:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; CHECK-NEXT: %[[#INTP:]] = bitcast i64* %p to i8*
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(i8* %[[#INTP]], i64 8)
; CHECK-NEXT: %[[#LABEL_ORIGIN:]] = call zeroext i64 @__dfsan_load_label_and_origin(ptr %p, i64 8)
; CHECK-NEXT: %[[#LABEL_ORIGIN_H32:]] = lshr i64 %[[#LABEL_ORIGIN]], 32
; CHECK-NEXT: %[[#LABEL:]] = trunc i64 %[[#LABEL_ORIGIN_H32]] to i[[#SBITS]]
; CHECK-NEXT: %[[#ORIGIN:]] = trunc i64 %[[#LABEL_ORIGIN]] to i32
@ -22,10 +21,10 @@ define i64 @load64(i64* %p) {
; CHECK-NEXT: %[[#NZ:]] = icmp ne i[[#SBITS]] %[[#PS]], 0
; CHECK-NEXT: %[[#ORIGIN_SEL:]] = select i1 %[[#NZ]], i32 %[[#PO]], i32 %[[#ORIGIN_CHAINED]]
; CHECK-NEXT: %a = load i64, i64* %p
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN_SEL]], i32* @__dfsan_retval_origin_tls, align 4
; CHECK-NEXT: %a = load i64, ptr %p
; CHECK-NEXT: store i[[#SBITS]] %[[#LABEL]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i32 %[[#ORIGIN_SEL]], ptr @__dfsan_retval_origin_tls, align 4
%a = load i64, i64* %p
%a = load i64, ptr %p
ret i64 %a
}

6
llvm/test/Instrumentation/DataFlowSanitizer/prefix-rename.ll
View File

@ -6,10 +6,10 @@ target triple = "x86_64-unknown-linux-gnu"
module asm ".symver f1,f@@version1"
; CHECK: @f2.dfsan = alias {{.*}} @f1.dfsan
@f2 = alias void (), void ()* @f1
@f2 = alias void (), ptr @f1
; CHECK: @g2.dfsan = alias {{.*}} @g1.dfsan
@g2 = alias void (i16*), bitcast (void (i8*)* @g1 to void (i16*)*)
@g2 = alias void (ptr), ptr @g1
; CHECK: define void @f1.dfsan
define void @f1() {
@ -17,6 +17,6 @@ define void @f1() {
}
; CHECK: define void @g1.dfsan
define void @g1(i8*) {
define void @g1(ptr) {
ret void
}

89
llvm/test/Instrumentation/DataFlowSanitizer/store.ll
View File

@ -6,98 +6,101 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define void @store0({} %v, {}* %p) {
define void @store0({} %v, ptr %p) {
; CHECK-LABEL: @store0.dfsan
; CHECK: store {} %v, {}* %p
; CHECK: store {} %v, ptr %p
; CHECK-NOT: store
; CHECK: ret void
store {} %v, {}* %p
store {} %v, ptr %p
ret void
}
define void @store8(i8 %v, i8* %p) {
define void @store8(i8 %v, ptr %p) {
; CHECK-LABEL: @store8.dfsan
; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; NO_COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: or i[[#SBITS]]
; CHECK: ptrtoint i8* {{.*}} i64
; CHECK: ptrtoint ptr {{.*}} i64
; CHECK-NEXT: xor i64
; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: inttoptr i64 {{.*}} ptr
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: store i8 %v, i8* %p
; CHECK-NEXT: store i8 %v, ptr %p
; CHECK-NEXT: ret void
store i8 %v, i8* %p
store i8 %v, ptr %p
ret void
}
define void @store16(i16 %v, i16* %p) {
define void @store16(i16 %v, ptr %p) {
; CHECK-LABEL: @store16.dfsan
; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; NO_COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: or i[[#SBITS]]
; CHECK: ptrtoint i16* {{.*}} i64
; CHECK: ptrtoint ptr {{.*}} i64
; CHECK-NEXT: xor i64
; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: inttoptr i64 {{.*}} ptr
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: store i16 %v, i16* %p
; CHECK-NEXT: store i16 %v, ptr %p
; CHECK-NEXT: ret void
store i16 %v, i16* %p
store i16 %v, ptr %p
ret void
}
define void @store32(i32 %v, i32* %p) {
define void @store32(i32 %v, ptr %p) {
; CHECK-LABEL: @store32.dfsan
; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; NO_COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: or i[[#SBITS]]
; CHECK: ptrtoint i32* {{.*}} i64
; CHECK: ptrtoint ptr {{.*}} i64
; CHECK-NEXT: xor i64
; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: inttoptr i64 {{.*}} ptr
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: getelementptr i[[#SBITS]], i[[#SBITS]]*
; CHECK-NEXT: getelementptr i[[#SBITS]], ptr
; CHECK-NEXT: store i[[#SBITS]]
; CHECK-NEXT: store i32 %v, i32* %p
; CHECK-NEXT: store i32 %v, ptr %p
; CHECK-NEXT: ret void
store i32 %v, i32* %p
store i32 %v, ptr %p
ret void
}
define void @store64(i64 %v, i64* %p) {
define void @store64(i64 %v, ptr %p) {
; CHECK-LABEL: @store64.dfsan
; CHECK: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i[[#SBITS]], i[[#SBITS]]* {{.*}} @__dfsan_arg_tls
; NO_COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: load i8, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align 2
; COMBINE_PTR_LABEL: load i[[#SBITS]], ptr @__dfsan_arg_tls
; COMBINE_PTR_LABEL: or i[[#SBITS]]
; CHECK: ptrtoint i64* {{.*}} i64
; CHECK: ptrtoint ptr {{.*}} i64
; CHECK-NEXT: xor i64
; CHECK-NEXT: inttoptr i64 {{.*}} i[[#SBITS]]*
; CHECK-NEXT: inttoptr i64 {{.*}} ptr
; CHECK-COUNT-8: insertelement {{.*}} i[[#SBITS]]
; CHECK-NEXT: bitcast i[[#SBITS]]* {{.*}} <8 x i[[#SBITS]]>*
; CHECK-NEXT: getelementptr <8 x i[[#SBITS]]>
; CHECK-NEXT: store <8 x i[[#SBITS]]>
; CHECK-NEXT: store i64 %v, i64* %p
; CHECK-NEXT: store i64 %v, ptr %p
; CHECK-NEXT: ret void
store i64 %v, i64* %p
store i64 %v, ptr %p
ret void
}
define void @store_zero(i32* %p) {
define void @store_zero(ptr %p) {
; CHECK-LABEL: @store_zero.dfsan
; NO_COMBINE_PTR_LABEL: bitcast i[[#SBITS]]* {{.*}} to i[[#mul(4, SBITS)]]*
; NO_COMBINE_PTR_LABEL: store i[[#mul(4, SBITS)]] 0, i[[#mul(4, SBITS)]]* {{.*}}
store i32 0, i32* %p
; NO_COMBINE_PTR_LABEL: store i[[#mul(4, SBITS)]] 0, ptr {{.*}}
store i32 0, ptr %p
ret void
}

150
llvm/test/Instrumentation/DataFlowSanitizer/struct.ll
View File

@ -12,38 +12,38 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK: @__dfsan_shadow_width_bits = weak_odr constant i32 [[#SBITS:]]
; CHECK: @__dfsan_shadow_width_bytes = weak_odr constant i32 [[#SBYTES:]]
define {i8*, i32} @pass_struct({i8*, i32} %s) {
define {ptr, i32} @pass_struct({ptr, i32} %s) {
; NO_COMBINE_LOAD_PTR: @pass_struct.dfsan
; NO_COMBINE_LOAD_PTR: [[L:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } [[L]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: [[L:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } [[L]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; DEBUG_NONZERO_LABELS: @pass_struct.dfsan
; DEBUG_NONZERO_LABELS: [[L:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; DEBUG_NONZERO_LABELS: [[L:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; DEBUG_NONZERO_LABELS: [[L0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[L]], 0
; DEBUG_NONZERO_LABELS: [[L1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[L]], 1
; DEBUG_NONZERO_LABELS: [[L01:%.*]] = or i[[#SBITS]] [[L0]], [[L1]]
; DEBUG_NONZERO_LABELS: {{.*}} = icmp ne i[[#SBITS]] [[L01]], 0
; DEBUG_NONZERO_LABELS: call void @__dfsan_nonzero_label()
; DEBUG_NONZERO_LABELS: store { i[[#SBITS]], i[[#SBITS]] } [[L]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; DEBUG_NONZERO_LABELS: store { i[[#SBITS]], i[[#SBITS]] } [[L]], ptr @__dfsan_retval_tls, align [[ALIGN]]
ret {i8*, i32} %s
ret {ptr, i32} %s
}
%StructOfAggr = type {i8*, [4 x i2], <4 x i3>, {i1, i1}}
%StructOfAggr = type {ptr, [4 x i2], <4 x i3>, {i1, i1}}
define %StructOfAggr @pass_struct_of_aggregate(%StructOfAggr %s) {
; NO_COMBINE_LOAD_PTR: @pass_struct_of_aggregate.dfsan
; NO_COMBINE_LOAD_PTR: %1 = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } %1, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN]]
; NO_COMBINE_LOAD_PTR: %1 = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } %1, ptr @__dfsan_retval_tls, align [[ALIGN]]
ret %StructOfAggr %s
}
define {} @load_empty_struct({}* %p) {
define {} @load_empty_struct(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_empty_struct.dfsan
; NO_COMBINE_LOAD_PTR: store {} zeroinitializer, {}* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to {}*), align 2
; NO_COMBINE_LOAD_PTR: store {} zeroinitializer, ptr @__dfsan_retval_tls, align 2
%a = load {}, {}* %p
%a = load {}, ptr %p
ret {} %a
}
@ -51,24 +51,24 @@ define {} @load_empty_struct({}* %p) {
define {i1, i32} @load_global_struct() {
; NO_COMBINE_LOAD_PTR: @load_global_struct.dfsan
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, ptr @__dfsan_retval_tls, align 2
%a = load {i1, i32}, {i1, i32}* @Y
%a = load {i1, i32}, ptr @Y
ret {i1, i32} %a
}
define {i1, i32} @select_struct(i1 %c, {i1, i32} %a, {i1, i32} %b) {
; NO_SELECT_CONTROL: @select_struct.dfsan
; NO_SELECT_CONTROL: [[B:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; NO_SELECT_CONTROL: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; NO_SELECT_CONTROL: [[C:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; NO_SELECT_CONTROL: [[B:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to ptr), align [[ALIGN:2]]
; NO_SELECT_CONTROL: [[A:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; NO_SELECT_CONTROL: [[C:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; NO_SELECT_CONTROL: [[S:%.*]] = select i1 %c, { i[[#SBITS]], i[[#SBITS]] } [[A]], { i[[#SBITS]], i[[#SBITS]] } [[B]]
; NO_SELECT_CONTROL: store { i[[#SBITS]], i[[#SBITS]] } [[S]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; NO_SELECT_CONTROL: store { i[[#SBITS]], i[[#SBITS]] } [[S]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; FAST: @select_struct.dfsan
; FAST: %[[#R:]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; FAST: %[[#R+1]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: %[[#R+2]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: %[[#R:]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to ptr), align [[ALIGN:2]]
; FAST: %[[#R+1]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; FAST: %[[#R+2]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: %[[#R+3]] = select i1 %c, { i[[#SBITS]], i[[#SBITS]] } %[[#R+1]], { i[[#SBITS]], i[[#SBITS]] } %[[#R]]
; FAST: %[[#R+4]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } %[[#R+3]], 0
; FAST: %[[#R+5]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } %[[#R+3]], 1
@ -76,7 +76,7 @@ define {i1, i32} @select_struct(i1 %c, {i1, i32} %a, {i1, i32} %b) {
; FAST: %[[#R+7]] = or i[[#SBITS]] %[[#R+2]], %[[#R+6]]
; FAST: %[[#R+8]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] %[[#R+7]], 0
; FAST: %[[#R+9]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } %[[#R+8]], i[[#SBITS]] %[[#R+7]], 1
; FAST: store { i[[#SBITS]], i[[#SBITS]] } %[[#R+9]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } %[[#R+9]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%s = select i1 %c, {i1, i32} %a, {i1, i32} %b
ret {i1, i32} %s
@ -84,12 +84,12 @@ define {i1, i32} @select_struct(i1 %c, {i1, i32} %a, {i1, i32} %b) {
define { i32, i32 } @asm_struct(i32 %0, i32 %1) {
; FAST: @asm_struct.dfsan
; FAST: [[E1:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: [[E0:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: [[E1:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN:2]]
; FAST: [[E0:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: [[E01:%.*]] = or i[[#SBITS]] [[E0]], [[E1]]
; FAST: [[S0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[E01]], 0
; FAST: [[S1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[S0]], i[[#SBITS]] [[E01]], 1
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
entry:
%a = call { i32, i32 } asm "", "=r,=r,r,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1)
@ -98,15 +98,15 @@ entry:
define {i32, i32} @const_struct() {
; FAST: @const_struct.dfsan
; FAST: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; FAST: store { i[[#SBITS]], i[[#SBITS]] } zeroinitializer, ptr @__dfsan_retval_tls, align 2
ret {i32, i32} { i32 42, i32 11 }
}
define i1 @extract_struct({i1, i5} %s) {
; FAST: @extract_struct.dfsan
; FAST: [[SM:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; FAST: [[SM:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[EM:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[SM]], 0
; FAST: store i[[#SBITS]] [[EM]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store i[[#SBITS]] [[EM]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e2 = extractvalue {i1, i5} %s, 0
ret i1 %e2
@ -114,20 +114,20 @@ define i1 @extract_struct({i1, i5} %s) {
define {i1, i5} @insert_struct({i1, i5} %s, i5 %e1) {
; FAST: @insert_struct.dfsan
; FAST: [[EM:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES)]]) to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: [[SM:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: [[EM:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES)]]) to ptr), align [[ALIGN:2]]
; FAST: [[SM:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: [[SM1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[SM]], i[[#SBITS]] [[EM]], 1
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[SM1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[SM1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%s1 = insertvalue {i1, i5} %s, i5 %e1, 1
ret {i1, i5} %s1
}
define {i1, i1} @load_struct({i1, i1}* %p) {
define {i1, i1} @load_struct(ptr %p) {
; NO_COMBINE_LOAD_PTR: @load_struct.dfsan
; NO_COMBINE_LOAD_PTR: [[OL:%.*]] = or i[[#SBITS]]
; NO_COMBINE_LOAD_PTR: [[S0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[OL]], 0
; NO_COMBINE_LOAD_PTR: [[S1:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } [[S0]], i[[#SBITS]] [[OL]], 1
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } [[S1]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align 2
; NO_COMBINE_LOAD_PTR: store { i[[#SBITS]], i[[#SBITS]] } [[S1]], ptr @__dfsan_retval_tls, align 2
; EVENT_CALLBACKS: @load_struct.dfsan
; EVENT_CALLBACKS: [[OL0:%.*]] = or i[[#SBITS]]
@ -135,46 +135,46 @@ define {i1, i1} @load_struct({i1, i1}* %p) {
; EVENT_CALLBACKS: [[S0:%.*]] = insertvalue { i[[#SBITS]], i[[#SBITS]] } undef, i[[#SBITS]] [[OL1]], 0
; EVENT_CALLBACKS: call void @__dfsan_load_callback(i[[#SBITS]] [[OL1]]
%s = load {i1, i1}, {i1, i1}* %p
%s = load {i1, i1}, ptr %p
ret {i1, i1} %s
}
define void @store_struct({i1, i1}* %p, {i1, i1} %s) {
define void @store_struct(ptr %p, {i1, i1} %s) {
; FAST: @store_struct.dfsan
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN:2]]
; FAST: [[E0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[S]], 0
; FAST: [[E1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[S]], 1
; FAST: [[E:%.*]] = or i[[#SBITS]] [[E0]], [[E1]]
; FAST: [[P0:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P:%.*]], i32 0
; FAST: store i[[#SBITS]] [[E]], i[[#SBITS]]* [[P0]], align [[#SBYTES]]
; FAST: [[P1:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P]], i32 1
; FAST: store i[[#SBITS]] [[E]], i[[#SBITS]]* [[P1]], align [[#SBYTES]]
; FAST: [[P0:%.*]] = getelementptr i[[#SBITS]], ptr [[P:%.*]], i32 0
; FAST: store i[[#SBITS]] [[E]], ptr [[P0]], align [[#SBYTES]]
; FAST: [[P1:%.*]] = getelementptr i[[#SBITS]], ptr [[P]], i32 1
; FAST: store i[[#SBITS]] [[E]], ptr [[P1]], align [[#SBYTES]]
; EVENT_CALLBACKS: @store_struct.dfsan
; EVENT_CALLBACKS: [[OL:%.*]] = or i[[#SBITS]]
; EVENT_CALLBACKS: call void @__dfsan_store_callback(i[[#SBITS]] [[OL]]
; COMBINE_STORE_PTR: @store_struct.dfsan
; COMBINE_STORE_PTR: [[PL:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; COMBINE_STORE_PTR: [[SL:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; COMBINE_STORE_PTR: [[PL:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; COMBINE_STORE_PTR: [[SL:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; COMBINE_STORE_PTR: [[SL0:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[SL]], 0
; COMBINE_STORE_PTR: [[SL1:%.*]] = extractvalue { i[[#SBITS]], i[[#SBITS]] } [[SL]], 1
; COMBINE_STORE_PTR: [[SL01:%.*]] = or i[[#SBITS]] [[SL0]], [[SL1]]
; COMBINE_STORE_PTR: [[E:%.*]] = or i[[#SBITS]] [[SL01]], [[PL]]
; COMBINE_STORE_PTR: [[P0:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P:%.*]], i32 0
; COMBINE_STORE_PTR: store i[[#SBITS]] [[E]], i[[#SBITS]]* [[P0]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], i[[#SBITS]]* [[P]], i32 1
; COMBINE_STORE_PTR: store i[[#SBITS]] [[E]], i[[#SBITS]]* [[P1]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P0:%.*]] = getelementptr i[[#SBITS]], ptr [[P:%.*]], i32 0
; COMBINE_STORE_PTR: store i[[#SBITS]] [[E]], ptr [[P0]], align [[#SBYTES]]
; COMBINE_STORE_PTR: [[P1:%.*]] = getelementptr i[[#SBITS]], ptr [[P]], i32 1
; COMBINE_STORE_PTR: store i[[#SBITS]] [[E]], ptr [[P1]], align [[#SBYTES]]
store {i1, i1} %s, {i1, i1}* %p
store {i1, i1} %s, ptr %p
ret void
}
define i2 @extract_struct_of_aggregate11(%StructOfAggr %s) {
; FAST: @extract_struct_of_aggregate11.dfsan
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E11:%.*]] = extractvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[E]], 1, 1
; FAST: store i[[#SBITS]] [[E11]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store i[[#SBITS]] [[E11]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e11 = extractvalue %StructOfAggr %s, 1, 1
ret i2 %e11
@ -182,74 +182,74 @@ define i2 @extract_struct_of_aggregate11(%StructOfAggr %s) {
define [4 x i2] @extract_struct_of_aggregate1(%StructOfAggr %s) {
; FAST: @extract_struct_of_aggregate1.dfsan
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E1:%.*]] = extractvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[E]], 1
; FAST: store [4 x i[[#SBITS]]] [[E1]], [4 x i[[#SBITS]]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to [4 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: store [4 x i[[#SBITS]]] [[E1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e1 = extractvalue %StructOfAggr %s, 1
ret [4 x i2] %e1
}
define <4 x i3> @extract_struct_of_aggregate2(%StructOfAggr %s) {
; FAST: @extract_struct_of_aggregate2.dfsan
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E2:%.*]] = extractvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[E]], 2
; FAST: store i[[#SBITS]] [[E2]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store i[[#SBITS]] [[E2]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e2 = extractvalue %StructOfAggr %s, 2
ret <4 x i3> %e2
}
define { i1, i1 } @extract_struct_of_aggregate3(%StructOfAggr %s) {
; FAST: @extract_struct_of_aggregate3.dfsan
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E3:%.*]] = extractvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[E]], 3
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[E3]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[E3]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e3 = extractvalue %StructOfAggr %s, 3
ret { i1, i1 } %e3
}
define i1 @extract_struct_of_aggregate31(%StructOfAggr %s) {
; FAST: @extract_struct_of_aggregate31.dfsan
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN:2]]
; FAST: [[E:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: [[E31:%.*]] = extractvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[E]], 3, 1
; FAST: store i[[#SBITS]] [[E31]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store i[[#SBITS]] [[E31]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%e31 = extractvalue %StructOfAggr %s, 3, 1
ret i1 %e31
}
define %StructOfAggr @insert_struct_of_aggregate11(%StructOfAggr %s, i2 %e11) {
; FAST: @insert_struct_of_aggregate11.dfsan
; FAST: [[E11:%.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(8, SBYTES)]]) to i[[#SBITS]]*), align [[ALIGN:2]]
; FAST: [[S:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN]]
; FAST: [[E11:%.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(8, SBYTES)]]) to ptr), align [[ALIGN:2]]
; FAST: [[S:%.*]] = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: [[S1:%.*]] = insertvalue { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[S]], i[[#SBITS]] [[E11]], 1, 1
; FAST: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[S1]], { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } [[S1]], ptr @__dfsan_retval_tls, align [[ALIGN]]
%s1 = insertvalue %StructOfAggr %s, i2 %e11, 1, 1
ret %StructOfAggr %s1
}
define {i8*, i32} @call_struct({i8*, i32} %s) {
define {ptr, i32} @call_struct({ptr, i32} %s) {
; FAST: @call_struct.dfsan
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S]], { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: %_dfsret = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } %_dfsret, { i[[#SBITS]], i[[#SBITS]] }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: %_dfsret = load { i[[#SBITS]], i[[#SBITS]] }, ptr @__dfsan_retval_tls, align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } %_dfsret, ptr @__dfsan_retval_tls, align [[ALIGN]]
%r = call {i8*, i32} @pass_struct({i8*, i32} %s)
ret {i8*, i32} %r
%r = call {ptr, i32} @pass_struct({ptr, i32} %s)
ret {ptr, i32} %r
}
declare %StructOfAggr @fun_with_many_aggr_args(<2 x i7> %v, [2 x i5] %a, {i3, i3} %s)
define %StructOfAggr @call_many_aggr_args(<2 x i7> %v, [2 x i5] %a, {i3, i3} %s) {
; FAST: @call_many_aggr_args.dfsan
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN:2]]
; FAST: [[A:%.*]] = load [2 x i[[#SBITS]]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to [2 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: [[V:%.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store i[[#SBITS]] [[V]], i[[#SBITS]]* bitcast ([[TLS_ARR]]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; FAST: store [2 x i[[#SBITS]]] [[A]], [2 x i[[#SBITS]]]* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 2) to [2 x i[[#SBITS]]]*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S]], { i[[#SBITS]], i[[#SBITS]] }* inttoptr (i64 add (i64 ptrtoint ([[TLS_ARR]]* @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to { i[[#SBITS]], i[[#SBITS]] }*), align [[ALIGN]]
; FAST: %_dfsret = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN]]
; FAST: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } %_dfsret, { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }* bitcast ([[TLS_ARR]]* @__dfsan_retval_tls to { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }*), align [[ALIGN]]
; FAST: [[S:%.*]] = load { i[[#SBITS]], i[[#SBITS]] }, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to ptr), align [[ALIGN:2]]
; FAST: [[A:%.*]] = load [2 x i[[#SBITS]]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; FAST: [[V:%.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: store i[[#SBITS]] [[V]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; FAST: store [2 x i[[#SBITS]]] [[A]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN]]
; FAST: store { i[[#SBITS]], i[[#SBITS]] } [[S]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 [[#mul(2, SBYTES) + 2]]) to ptr), align [[ALIGN]]
; FAST: %_dfsret = load { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } }, ptr @__dfsan_retval_tls, align [[ALIGN]]
; FAST: store { i[[#SBITS]], [4 x i[[#SBITS]]], i[[#SBITS]], { i[[#SBITS]], i[[#SBITS]] } } %_dfsret, ptr @__dfsan_retval_tls, align [[ALIGN]]
%r = call %StructOfAggr @fun_with_many_aggr_args(<2 x i7> %v, [2 x i5] %a, {i3, i3} %s)
ret %StructOfAggr %r

8
llvm/test/Instrumentation/DataFlowSanitizer/union.ll
View File

@ -14,10 +14,10 @@ target triple = "x86_64-unknown-linux-gnu"
define void @f(i32 %x, i32 %y) {
; CHECK: or i[[#SBITS]]
%xay = add i32 %x, %y
store i32 %xay, i32* @a
store i32 %xay, ptr @a
; CHECK-NOT: or i[[#SBITS]]
%xmy = mul i32 %x, %y
store i32 %xmy, i32* @b
store i32 %xmy, ptr @b
ret void
}
@ -31,13 +31,13 @@ define void @g(i1 %p, i32 %x, i32 %y) {
l1:
; CHECK: or i[[#SBITS]]
%xay = add i32 %x, %y
store i32 %xay, i32* @a
store i32 %xay, ptr @a
br label %l3
l2:
; CHECK: or i[[#SBITS]]
%xmy = mul i32 %x, %y
store i32 %xmy, i32* @b
store i32 %xmy, ptr @b
br label %l3
l3:

24
llvm/test/Instrumentation/DataFlowSanitizer/unordered_atomic_mem_intrins.ll
View File

@ -8,30 +8,30 @@ target triple = "x86_64-unknown-linux-gnu"
;; verify that dfsan handles these intrinsics properly once they have been
;; added to that class hierarchy.
declare void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* nocapture writeonly, i8, i64, i32) nounwind
declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32) nounwind
declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture writeonly, i8, i64, i32) nounwind
declare void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind
declare void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i32) nounwind
define void @test_memcpy(i8* nocapture, i8* nocapture) {
define void @test_memcpy(ptr nocapture, ptr nocapture) {
; CHECK-LABEL: test_memcpy.dfsan
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 16, i32 1)
; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %0, ptr align 1 %1, i64 16, i32 1)
; CHECK: ret void
call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 16, i32 1)
call void @llvm.memcpy.element.unordered.atomic.p0.p0.i64(ptr align 1 %0, ptr align 1 %1, i64 16, i32 1)
ret void
}
define void @test_memmove(i8* nocapture, i8* nocapture) {
define void @test_memmove(ptr nocapture, ptr nocapture) {
; CHECK-LABEL: test_memmove.dfsan
; CHECK: call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 16, i32 1)
; CHECK: call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %0, ptr align 1 %1, i64 16, i32 1)
; CHECK: ret void
call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i64(i8* align 1 %0, i8* align 1 %1, i64 16, i32 1)
call void @llvm.memmove.element.unordered.atomic.p0.p0.i64(ptr align 1 %0, ptr align 1 %1, i64 16, i32 1)
ret void
}
define void @test_memset(i8* nocapture) {
define void @test_memset(ptr nocapture) {
; CHECK-LABEL: test_memset.dfsan
; CHECK: call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %0, i8 88, i64 16, i32 1)
; CHECK: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %0, i8 88, i64 16, i32 1)
; CHECK: ret void
call void @llvm.memset.element.unordered.atomic.p0i8.i64(i8* align 1 %0, i8 88, i64 16, i32 1)
call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 1 %0, i8 88, i64 16, i32 1)
ret void
}

28
llvm/test/Instrumentation/DataFlowSanitizer/vector.ll
View File

@ -7,31 +7,31 @@ target triple = "x86_64-unknown-linux-gnu"
define <4 x i4> @pass_vector(<4 x i4> %v) {
; CHECK-LABEL: @pass_vector.dfsan
; CHECK-NEXT: %[[#REG:]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: store i[[#SBITS]] %[[#REG]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[#REG:]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; CHECK-NEXT: store i[[#SBITS]] %[[#REG]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret <4 x i4> %v
ret <4 x i4> %v
}
define void @load_update_store_vector(<4 x i4>* %p) {
define void @load_update_store_vector(ptr %p) {
; CHECK-LABEL: @load_update_store_vector.dfsan
; CHECK: {{.*}} = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align 2
; CHECK: {{.*}} = load i[[#SBITS]], ptr @__dfsan_arg_tls, align 2
%v = load <4 x i4>, <4 x i4>* %p
%v = load <4 x i4>, ptr %p
%e2 = extractelement <4 x i4> %v, i32 2
%v1 = insertelement <4 x i4> %v, i4 %e2, i32 0
store <4 x i4> %v1, <4 x i4>* %p
store <4 x i4> %v1, ptr %p
ret void
}
define <4 x i1> @icmp_vector(<4 x i8> %a, <4 x i8> %b) {
; CHECK-LABEL: @icmp_vector.dfsan
; CHECK-NEXT: %[[B:.*]] = load i[[#SBITS]], i[[#SBITS]]* inttoptr (i64 add (i64 ptrtoint ([100 x i64]* @__dfsan_arg_tls to i64), i64 2) to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: %[[A:.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[B:.*]] = load i[[#SBITS]], ptr inttoptr (i64 add (i64 ptrtoint (ptr @__dfsan_arg_tls to i64), i64 2) to ptr), align [[ALIGN:2]]
; CHECK-NEXT: %[[A:.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK: %[[L:.*]] = or i[[#SBITS]] %[[A]], %[[B]]
; CHECK: %r = icmp eq <4 x i8> %a, %b
; CHECK: store i[[#SBITS]] %[[L]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK: store i[[#SBITS]] %[[L]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK: ret <4 x i1> %r
%r = icmp eq <4 x i8> %a, %b
@ -40,7 +40,7 @@ define <4 x i1> @icmp_vector(<4 x i8> %a, <4 x i8> %b) {
define <2 x i32> @const_vector() {
; CHECK-LABEL: @const_vector.dfsan
; CHECK-NEXT: store i[[#SBITS]] 0, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align 2
; CHECK-NEXT: store i[[#SBITS]] 0, ptr @__dfsan_retval_tls, align 2
; CHECK-NEXT: ret <2 x i32> <i32 42, i32 11>
ret <2 x i32> < i32 42, i32 11 >
@ -48,11 +48,11 @@ define <2 x i32> @const_vector() {
define <4 x i4> @call_vector(<4 x i4> %v) {
; CHECK-LABEL: @call_vector.dfsan
; CHECK-NEXT: %[[V:.*]] = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN:2]]
; CHECK-NEXT: store i[[#SBITS]] %[[V]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_arg_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %[[V:.*]] = load i[[#SBITS]], ptr @__dfsan_arg_tls, align [[ALIGN:2]]
; CHECK-NEXT: store i[[#SBITS]] %[[V]], ptr @__dfsan_arg_tls, align [[ALIGN]]
; CHECK-NEXT: %r = call <4 x i4> @pass_vector.dfsan(<4 x i4> %v)
; CHECK-NEXT: %_dfsret = load i[[#SBITS]], i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: store i[[#SBITS]] %_dfsret, i[[#SBITS]]* bitcast ([100 x i64]* @__dfsan_retval_tls to i[[#SBITS]]*), align [[ALIGN]]
; CHECK-NEXT: %_dfsret = load i[[#SBITS]], ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: store i[[#SBITS]] %_dfsret, ptr @__dfsan_retval_tls, align [[ALIGN]]
; CHECK-NEXT: ret <4 x i4> %r
%r = call <4 x i4> @pass_vector(<4 x i4> %v)