forked from OSchip/llvm-project
[ms-inline asm] Add support for the pushad/popad mnemonics.
rdar://13254235 llvm-svn: 176036
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dbe8890be2
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669bb3ee77
llvm
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@ -870,16 +870,14 @@ let Defs = [RSP], Uses = [RSP, EFLAGS], mayStore = 1, neverHasSideEffects=1 in
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def PUSHF64 : I<0x9C, RawFrm, (outs), (ins), "pushfq", [], IIC_PUSH_F>,
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def PUSHF64 : I<0x9C, RawFrm, (outs), (ins), "pushfq", [], IIC_PUSH_F>,
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Requires<[In64BitMode]>;
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Requires<[In64BitMode]>;
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let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP],
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let Defs = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP], Uses = [ESP],
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mayLoad=1, neverHasSideEffects=1 in {
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mayLoad=1, neverHasSideEffects=1 in {
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def POPA32 : I<0x61, RawFrm, (outs), (ins), "popa{l}", [], IIC_POP_A>,
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def POPA32 : I<0x61, RawFrm, (outs), (ins), "popa{l|d}", [], IIC_POP_A>,
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Requires<[In32BitMode]>;
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Requires<[In32BitMode]>;
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}
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}
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let Defs = [ESP], Uses = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP],
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let Defs = [ESP], Uses = [EDI, ESI, EBP, EBX, EDX, ECX, EAX, ESP],
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mayStore=1, neverHasSideEffects=1 in {
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mayStore=1, neverHasSideEffects=1 in {
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def PUSHA32 : I<0x60, RawFrm, (outs), (ins), "pusha{l}", [], IIC_PUSH_A>,
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def PUSHA32 : I<0x60, RawFrm, (outs), (ins), "pusha{l|d}", [], IIC_PUSH_A>,
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Requires<[In32BitMode]>;
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Requires<[In32BitMode]>;
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}
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}
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@ -57,4 +57,17 @@ _t21: ## @t21
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// CHECK: movl 4(%esi,%eax,2), %eax
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// CHECK: movl 4(%esi,%eax,2), %eax
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// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
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// CHECK: # encoding: [0x8b,0x44,0x46,0x04]
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pusha
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// CHECK: pushal
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// CHECK: # encoding: [0x60]
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popa
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// CHECK: popal
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// CHECK: # encoding: [0x61]
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pushad
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// CHECK: pushal
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// CHECK: # encoding: [0x60]
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popad
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// CHECK: popal
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// CHECK: # encoding: [0x61]
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ret
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ret
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