forked from OSchip/llvm-project
parent
b0cbe7106e
commit
665c26ab40
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@ -3015,34 +3015,34 @@ def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
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def MOVAPSrr : I<0x28, MRMSrcMem, (ops V4F4:$dst, V4F4:$src),
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"movaps {$src, $dst|$dst, $src}", []>,
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Requires<[HasSSE1]>, XS;
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Requires<[HasSSE1]>, TB;
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def MOVAPDrr : I<0x28, MRMSrcMem, (ops V2F8:$dst, V2F8:$src),
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"movapd {$src, $dst|$dst, $src}", []>,
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Requires<[HasSSE2]>, XD;
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Requires<[HasSSE2]>, TB, OpSize;
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def MOVAPSrm : I<0x28, MRMSrcMem, (ops V4F4:$dst, f128mem:$src),
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"movaps {$src, $dst|$dst, $src}", []>,
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Requires<[HasSSE1]>, XS;
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Requires<[HasSSE1]>, TB;
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def MOVAPSmr : I<0x29, MRMDestMem, (ops f128mem:$dst, V4F4:$src),
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"movaps {$src, $dst|$dst, $src}",[]>,
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Requires<[HasSSE1]>, XD;
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Requires<[HasSSE1]>, TB;
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def MOVAPDrm : I<0x28, MRMSrcMem, (ops V2F8:$dst, f128mem:$src),
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"movapd {$src, $dst|$dst, $src}", []>,
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Requires<[HasSSE1]>, XD;
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Requires<[HasSSE1]>, TB, OpSize;
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def MOVAPDmr : I<0x29, MRMDestMem, (ops f128mem:$dst, V2F8:$src),
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"movapd {$src, $dst|$dst, $src}",[]>,
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Requires<[HasSSE2]>, XD;
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Requires<[HasSSE2]>, TB, OpSize;
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// Pseudo-instructions to load FR32 / FR64 from f128mem using movaps / movapd.
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// Upper bits are disregarded.
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def MOVSAPSrm : I<0x28, MRMSrcMem, (ops FR32:$dst, f128mem:$src),
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"movaps {$src, $dst|$dst, $src}",
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[(set FR32:$dst, (X86loadpf32 addr:$src))]>,
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Requires<[HasSSE1]>, XS;
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Requires<[HasSSE1]>, TB;
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def MOVSAPDrm : I<0x28, MRMSrcMem, (ops FR64:$dst, f128mem:$src),
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"movapd {$src, $dst|$dst, $src}",
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[(set FR64:$dst, (X86loadpf64 addr:$src))]>,
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Requires<[HasSSE1]>, XD;
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Requires<[HasSSE2]>, TB, OpSize;
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//===----------------------------------------------------------------------===//
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