forked from OSchip/llvm-project
[AMDGPU] Remove a no-op check in the gfx90a hazard recognizer
Also rename helper function accordingly. Differential Revision: https://reviews.llvm.org/D114289
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@ -1442,12 +1442,10 @@ int GCNHazardRecognizer::checkMAIHazards90A(MachineInstr *MI) {
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bool FullReg;
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const MachineInstr *MI1;
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auto IsOverlappedDGEMMorXDLFn = [Reg, &IsMFMAFn, &FullReg, &MI1,
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this](const MachineInstr &MI) {
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auto IsOverlappedMFMAFn = [Reg, &IsMFMAFn, &FullReg, &MI1,
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this](const MachineInstr &MI) {
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if (!IsMFMAFn(MI))
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return false;
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if (!isDGEMM(MI.getOpcode()) && !isXDL(ST, MI))
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return false;
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Register DstReg = MI.getOperand(0).getReg();
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FullReg = (DstReg == Reg);
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MI1 = &MI;
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@ -1458,8 +1456,8 @@ int GCNHazardRecognizer::checkMAIHazards90A(MachineInstr *MI) {
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getWaitStatesSinceDef(Reg, IsLegacyVALUNotDotFn, MaxWaitStates);
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WaitStatesNeeded = std::max(WaitStatesNeeded, WaitStatesNeededForUse);
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int NumWaitStates = getWaitStatesSinceDef(Reg, IsOverlappedDGEMMorXDLFn,
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MaxWaitStates);
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int NumWaitStates =
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getWaitStatesSinceDef(Reg, IsOverlappedMFMAFn, MaxWaitStates);
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if (NumWaitStates == std::numeric_limits<int>::max())
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continue;
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@ -1619,12 +1617,9 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) {
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const MachineInstr *MFMA = nullptr;
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unsigned Reg;
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auto IsDGEMMorXDLWriteFn = [&Reg, &IsMFMAFn, &MFMA,
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this](const MachineInstr &MI) {
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auto IsMFMAWriteFn = [&Reg, &IsMFMAFn, &MFMA, this](const MachineInstr &MI) {
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if (!IsMFMAFn(MI) || !TRI.regsOverlap(MI.getOperand(0).getReg(), Reg))
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return false;
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if (!isDGEMM(MI.getOpcode()) && !isXDL(ST, MI))
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return false;
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MFMA = &MI;
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return true;
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};
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@ -1675,8 +1670,8 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) {
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}
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MFMA = nullptr;
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WaitStatesSinceDef = getWaitStatesSinceDef(Reg, IsDGEMMorXDLWriteFn,
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MaxWaitStates);
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WaitStatesSinceDef =
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getWaitStatesSinceDef(Reg, IsMFMAWriteFn, MaxWaitStates);
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if (!MFMA)
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continue;
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@ -1750,8 +1745,8 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) {
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WaitStatesSinceDef);
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MFMA = nullptr;
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WaitStatesSinceDef = getWaitStatesSinceDef(Reg, IsDGEMMorXDLWriteFn,
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MaxWaitStates);
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WaitStatesSinceDef =
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getWaitStatesSinceDef(Reg, IsMFMAWriteFn, MaxWaitStates);
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if (MFMA) {
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int NeedWaitStates = MaxWaitStates;
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switch (TSchedModel.computeInstrLatency(MFMA)) {
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