forked from OSchip/llvm-project
Reapply Gabor's 113839, 113840, and 113876 with a fix for a problem
encountered while building llvm-gcc for arm. This is probably the same issue that the ppc buildbot hit. llvm::prior works on a MachineBasicBlock::iterator, not a plain MachineInstr. llvm-svn: 113983
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@ -1352,6 +1352,21 @@ AnalyzeCompare(const MachineInstr *MI, unsigned &SrcReg, int &CmpValue) const {
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SrcReg = MI->getOperand(0).getReg();
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CmpValue = MI->getOperand(1).getImm();
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return true;
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case ARM::TSTri: {
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MachineBasicBlock::const_iterator MII(MI);
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if (MI->getParent()->begin() == MII)
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return false;
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const MachineInstr *AND = llvm::prior(MII);
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if (AND->getOpcode() != ARM::ANDri)
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return false;
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if (MI->getOperand(0).getReg() == AND->getOperand(1).getReg() &&
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MI->getOperand(1).getImm() == AND->getOperand(2).getImm()) {
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SrcReg = AND->getOperand(0).getReg();
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CmpValue = 0;
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return true;
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}
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}
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break;
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}
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return false;
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@ -1401,6 +1416,8 @@ OptimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, int CmpValue,
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switch (MI->getOpcode()) {
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default: break;
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case ARM::ADDri:
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case ARM::ANDri:
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case ARM::t2ANDri:
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case ARM::SUBri:
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case ARM::t2ADDri:
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case ARM::t2SUBri:
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@ -17,8 +17,7 @@ tailrecurse: ; preds = %sw.bb, %entry
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%tmp2 = load i8** %scevgep5
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%0 = ptrtoint i8* %tmp2 to i32
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; CHECK: and lr, r12, #3
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; CHECK-NEXT: tst r12, #3
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; CHECK: ands r12, r12, #3
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; CHECK-NEXT: beq LBB0_4
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; T2: movs r5, #3
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