forked from OSchip/llvm-project
Stop passing iterators around by reference now that we have ilists!
Implement cast Type::ULongTy -> double llvm-svn: 11726
This commit is contained in:
Chris Lattner
parent
887b941fbb
commit
6590c29971
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@ -174,11 +174,11 @@ namespace {
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void visitSimpleBinary(BinaryOperator &B, unsigned OpcodeClass);
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void visitAdd(BinaryOperator &B) { visitSimpleBinary(B, 0); }
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void visitSub(BinaryOperator &B) { visitSimpleBinary(B, 1); }
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void doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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void doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, const Type *DestTy,
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unsigned Op0Reg, unsigned Op1Reg);
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void doMultiplyConst(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, const Type *DestTy,
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unsigned Op0Reg, unsigned Op1Val);
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void visitMul(BinaryOperator &B);
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@ -196,7 +196,7 @@ namespace {
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void visitSetCondInst(SetCondInst &I);
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unsigned EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI);
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MachineBasicBlock::iterator MBBI);
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// Memory Instructions
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void visitLoadInst(LoadInst &I);
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@ -231,32 +231,32 @@ namespace {
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/// emitCastOperation - Common code shared between visitCastInst and
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/// constant expression cast support.
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void emitCastOperation(MachineBasicBlock *BB,MachineBasicBlock::iterator&IP,
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void emitCastOperation(MachineBasicBlock *BB,MachineBasicBlock::iterator IP,
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Value *Src, const Type *DestTy, unsigned TargetReg);
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/// emitSimpleBinaryOperation - Common code shared between visitSimpleBinary
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/// and constant expression support.
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void emitSimpleBinaryOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op0, Value *Op1,
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unsigned OperatorClass, unsigned TargetReg);
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void emitDivRemOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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unsigned Op0Reg, unsigned Op1Reg, bool isDiv,
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const Type *Ty, unsigned TargetReg);
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/// emitSetCCOperation - Common code shared between visitSetCondInst and
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/// constant expression support.
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void emitSetCCOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op0, Value *Op1, unsigned Opcode,
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unsigned TargetReg);
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/// emitShiftOperation - Common code shared between visitShiftInst and
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/// constant expression support.
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void emitShiftOperation(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op, Value *ShiftAmount, bool isLeftShift,
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const Type *ResultTy, unsigned DestReg);
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@ -265,7 +265,7 @@ namespace {
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/// specified constant into the specified register.
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///
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void copyConstantToRegister(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &MBBI,
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MachineBasicBlock::iterator MBBI,
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Constant *C, unsigned Reg);
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/// makeAnotherReg - This method returns the next register number we haven't
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@ -305,7 +305,7 @@ namespace {
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return getReg(V, BB, It);
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}
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unsigned getReg(Value *V, MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IPt) {
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MachineBasicBlock::iterator IPt) {
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unsigned &Reg = RegMap[V];
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if (Reg == 0) {
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Reg = makeAnotherReg(V->getType());
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@ -371,7 +371,7 @@ static inline TypeClass getClassB(const Type *Ty) {
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/// specified constant into the specified register.
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///
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void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Constant *C, unsigned R) {
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if (ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
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unsigned Class = 0;
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@ -765,7 +765,7 @@ static const unsigned SetCCOpcodeTab[2][8] = {
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// returning the extended setcc code to use.
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unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP) {
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MachineBasicBlock::iterator IP) {
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// The arguments are already supposed to be of the same type.
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const Type *CompTy = Op0->getType();
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unsigned Class = getClassB(CompTy);
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@ -885,7 +885,7 @@ void ISel::visitSetCondInst(SetCondInst &I) {
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/// emitSetCCOperation - Common code shared between visitSetCondInst and
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/// constant expression support.
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void ISel::emitSetCCOperation(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op0, Value *Op1, unsigned Opcode,
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unsigned TargetReg) {
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unsigned OpNum = getSetCCNumber(Opcode);
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@ -1400,7 +1400,7 @@ void ISel::visitSimpleBinary(BinaryOperator &B, unsigned OperatorClass) {
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/// and constant expression support.
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///
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void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op0, Value *Op1,
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unsigned OperatorClass, unsigned DestReg) {
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unsigned Class = getClassB(Op0->getType());
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@ -1514,7 +1514,7 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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/// registers op0Reg and op1Reg, and put the result in DestReg. The type of the
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/// result should be given as DestTy.
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///
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void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI,
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void ISel::doMultiply(MachineBasicBlock *MBB, MachineBasicBlock::iterator MBBI,
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unsigned DestReg, const Type *DestTy,
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unsigned op0Reg, unsigned op1Reg) {
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unsigned Class = getClass(DestTy);
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@ -1552,7 +1552,7 @@ static unsigned ExactLog2(unsigned Val) {
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}
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void ISel::doMultiplyConst(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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unsigned DestReg, const Type *DestTy,
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unsigned op0Reg, unsigned ConstRHS) {
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unsigned Class = getClass(DestTy);
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@ -1658,7 +1658,7 @@ void ISel::visitDivRem(BinaryOperator &I) {
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}
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void ISel::emitDivRemOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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unsigned Op0Reg, unsigned Op1Reg, bool isDiv,
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const Type *Ty, unsigned ResultReg) {
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unsigned Class = getClass(Ty);
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@ -1748,7 +1748,7 @@ void ISel::visitShiftInst(ShiftInst &I) {
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/// emitShiftOperation - Common code shared between visitShiftInst and
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/// constant expression support.
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void ISel::emitShiftOperation(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Op, Value *ShiftAmount, bool isLeftShift,
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const Type *ResultTy, unsigned DestReg) {
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unsigned SrcReg = getReg (Op, MBB, IP);
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@ -1951,7 +1951,7 @@ void ISel::visitCastInst(CastInst &CI) {
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/// emitCastOperation - Common code shared between visitCastInst and
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/// constant expression cast support.
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void ISel::emitCastOperation(MachineBasicBlock *BB,
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MachineBasicBlock::iterator &IP,
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MachineBasicBlock::iterator IP,
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Value *Src, const Type *DestTy,
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unsigned DestReg) {
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unsigned SrcReg = getReg(Src, BB, IP);
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@ -2070,6 +2070,7 @@ void ISel::emitCastOperation(MachineBasicBlock *BB,
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//
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const Type *PromoteType = 0;
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unsigned PromoteOpcode;
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unsigned RealDestReg = DestReg;
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switch (SrcTy->getPrimitiveID()) {
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case Type::BoolTyID:
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case Type::SByteTyID:
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@ -2097,23 +2098,24 @@ void ISel::emitCastOperation(MachineBasicBlock *BB,
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break;
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}
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case Type::ULongTyID:
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assert(0 && "FIXME: not implemented: cast ulong X to fp type!");
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// Don't fild into the read destination.
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DestReg = makeAnotherReg(Type::DoubleTy);
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break;
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default: // No promotion needed...
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break;
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}
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if (PromoteType) {
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unsigned TmpReg = makeAnotherReg(PromoteType);
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BMI(BB, IP, SrcTy->isSigned() ? X86::MOVSXr16r8 : X86::MOVZXr16r8,
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1, TmpReg).addReg(SrcReg);
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unsigned Opc = SrcTy->isSigned() ? X86::MOVSXr16r8 : X86::MOVZXr16r8;
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BMI(BB, IP, Opc, 1, TmpReg).addReg(SrcReg);
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SrcTy = PromoteType;
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SrcClass = getClass(PromoteType);
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SrcReg = TmpReg;
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}
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// Spill the integer to memory and reload it from there...
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int FrameIdx =
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F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData());
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int FrameIdx = F->getFrameInfo()->CreateStackObject(SrcTy, TM.getTargetData());
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if (SrcClass == cLong) {
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addFrameReference(BMI(BB, IP, X86::MOVmr32, 5), FrameIdx).addReg(SrcReg);
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@ -2127,6 +2129,34 @@ void ISel::emitCastOperation(MachineBasicBlock *BB,
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static const unsigned Op2[] =
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{ 0/*byte*/, X86::FILDr16, X86::FILDr32, 0/*FP*/, X86::FILDr64 };
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addFrameReference(BMI(BB, IP, Op2[SrcClass], 5, DestReg), FrameIdx);
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// We need special handling for unsigned 64-bit integer sources. If the
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// input number has the "sign bit" set, then we loaded it incorrectly as a
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// negative 64-bit number. In this case, add an offset value.
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if (SrcTy == Type::ULongTy) {
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// Emit a test instruction to see if the dynamic input value was signed.
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BMI(BB, IP, X86::TESTrr32, 2).addReg(SrcReg+1).addReg(SrcReg+1);
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// If the sign bit is set, get a pointer to an offset, otherwise get a pointer to a zero.
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MachineConstantPool *CP = F->getConstantPool();
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unsigned Zero = makeAnotherReg(Type::IntTy);
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addConstantPoolReference(BMI(BB, IP, X86::LEAr32, 5, Zero),
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CP->getConstantPoolIndex(Constant::getNullValue(Type::UIntTy)));
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unsigned Offset = makeAnotherReg(Type::IntTy);
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addConstantPoolReference(BMI(BB, IP, X86::LEAr32, 5, Offset),
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CP->getConstantPoolIndex(ConstantUInt::get(Type::UIntTy,
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0x5f800000)));
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unsigned Addr = makeAnotherReg(Type::IntTy);
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BMI(BB, IP, X86::CMOVSrr32, 2, Addr).addReg(Zero).addReg(Offset);
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// Load the constant for an add. FIXME: this could make an 'fadd' that
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// reads directly from memory, but we don't support these yet.
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unsigned ConstReg = makeAnotherReg(Type::DoubleTy);
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addDirectMem(BMI(BB, IP, X86::FLDr32, 4, ConstReg), Addr);
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BMI(BB, IP, X86::FpADD, 2, RealDestReg).addReg(ConstReg).addReg(DestReg);
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}
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return;
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}
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