[RuntimeDyld][MachO] Support ARM64_RELOC_BRANCH26 for BL instructions by

relaxing an assertion.

llvm-svn: 326290

llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h

@@ -66,9 +66,11 @@ public:
         Addend = *reinterpret_cast<support::ulittle64_t *>(LocalAddress);
       break;
     case MachO::ARM64_RELOC_BRANCH26: {
-      // Verify that the relocation points to the expected branch instruction.
+      // Verify that the relocation points to a B/BL instruction.
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
-      assert((*p & 0xFC000000) == 0x14000000 && "Expected branch instruction.");
+      assert(((*p & 0xFC000000) == 0x14000000 ||
+	      (*p & 0xFC000000) == 0x94000000)
+	     && "Expected branch instruction.");
 
       // Get the 26 bit addend encoded in the branch instruction and sign-extend
       // to 64 bit. The lower 2 bits are always zeros and are therefore implicit

llvm/test/ExecutionEngine/RuntimeDyld/AArch64/MachO_ARM64_relocations.s

@@ -23,6 +23,13 @@ br1:
     b _foo
     ret
 
+    .globl  _test_branch_reloc_bl
+    .align  2
+# rtdyld-check:  decode_operand(br2, 0)[25:0] = (_foo - br2)[27:2]
+_test_branch_reloc_bl:
+br2:
+    bl _foo
+    ret	
 
 # Test ARM64_RELOC_PAGE21 and ARM64_RELOC_PAGEOFF12 relocation. adrp encodes
 # the PC-relative page (4 KiB) difference between the adrp instruction and the