forked from OSchip/llvm-project
Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often
allows other simplifications. For example, this compiles: int isnegative(unsigned int X) { return !(X < 2147483648U); } Into this code: x86: movl 4(%esp), %eax shrl $31, %eax ret arm: mov r0, r0, lsr #31 bx lr thumb: lsr r0, r0, #31 bx lr instead of: x86: cmpl $0, 4(%esp) sets %al movzbl %al, %eax ret arm: mov r3, #0 cmp r0, #0 movlt r3, #1 mov r0, r3 bx lr thumb: mov r2, #1 mov r1, #0 cmp r0, #0 blt LBB1_2 @entry LBB1_1: @entry cpy r2, r1 LBB1_2: @entry cpy r0, r2 bx lr Testcase here: test/CodeGen/Generic/ispositive.ll llvm-svn: 35883
This commit is contained in:
parent
05362ffdce
commit
65786b078c
|
@ -2130,6 +2130,15 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
|
|||
}
|
||||
}
|
||||
|
||||
// sext(setcc x,y,cc) -> select_cc x, y, -1, 0, cc
|
||||
if (N0.getOpcode() == ISD::SETCC) {
|
||||
SDOperand SCC =
|
||||
SimplifySelectCC(N0.getOperand(0), N0.getOperand(1),
|
||||
DAG.getConstant(~0ULL, VT), DAG.getConstant(0, VT),
|
||||
cast<CondCodeSDNode>(N0.getOperand(2))->get());
|
||||
if (SCC.Val) return SCC;
|
||||
}
|
||||
|
||||
return SDOperand();
|
||||
}
|
||||
|
||||
|
@ -2210,6 +2219,16 @@ SDOperand DAGCombiner::visitZERO_EXTEND(SDNode *N) {
|
|||
ExtLoad.getValue(1));
|
||||
return SDOperand(N, 0); // Return N so it doesn't get rechecked!
|
||||
}
|
||||
|
||||
// zext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
|
||||
if (N0.getOpcode() == ISD::SETCC) {
|
||||
SDOperand SCC =
|
||||
SimplifySelectCC(N0.getOperand(0), N0.getOperand(1),
|
||||
DAG.getConstant(1, VT), DAG.getConstant(0, VT),
|
||||
cast<CondCodeSDNode>(N0.getOperand(2))->get());
|
||||
if (SCC.Val) return SCC;
|
||||
}
|
||||
|
||||
return SDOperand();
|
||||
}
|
||||
|
||||
|
@ -2294,6 +2313,16 @@ SDOperand DAGCombiner::visitANY_EXTEND(SDNode *N) {
|
|||
ExtLoad.getValue(1));
|
||||
return SDOperand(N, 0); // Return N so it doesn't get rechecked!
|
||||
}
|
||||
|
||||
// aext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
|
||||
if (N0.getOpcode() == ISD::SETCC) {
|
||||
SDOperand SCC =
|
||||
SimplifySelectCC(N0.getOperand(0), N0.getOperand(1),
|
||||
DAG.getConstant(1, VT), DAG.getConstant(0, VT),
|
||||
cast<CondCodeSDNode>(N0.getOperand(2))->get());
|
||||
if (SCC.Val) return SCC;
|
||||
}
|
||||
|
||||
return SDOperand();
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue