forked from OSchip/llvm-project
Description of the SPARC as a target architecture.
llvm-svn: 233
This commit is contained in:
Vikram S. Adve
parent
3414e78e29
commit
656823944e
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LEVEL = ../../../..
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DIRS =
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LIBRARYNAME = sparc
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## List source files in link order
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Source = \
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Sparc.o \
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Sparc.burm.o \
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SparcInstrSelection.o
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include $(LEVEL)/Makefile.common
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BURG = burg -I
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%.burm.c: %.burg
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$(BURG) -o $@ $<
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@ -0,0 +1,282 @@
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%{
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#include <stdio.h>
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#include <llvm/Codegen/InstrForest.h>
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typedef BasicTreeNode* NODEPTR_TYPE;
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#define OP_LABEL(p) ((p)->opLabel)
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#define LEFT_CHILD(p) ((p)->leftChild)
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#define RIGHT_CHILD(p) ((p)->rightChild)
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#define STATE_LABEL(p) ((p)->state)
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#define PANIC printf
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%}
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%start stmt
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%term Ret=1 /* return void from a function */
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%term RetValue=101 /* return a value from a function */
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%term BrUncond=2
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%term BrCond=102
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%term Switch=3
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/* 4 is unused */
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%term Not=4
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%term Add=5
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%term Sub=6
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%term Mul=7
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%term Div=8
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%term Rem=9
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%term And=10
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%term Or=11
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%term Xor=12
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%term SetCC=113 /* use this to match all SetCC instructions */
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/* %term SetEQ=13 */
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/* %term SetNE=14 */
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/* %term SetLE=15 */
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/* %term SetGE=16 */
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/* %term SetLT=17 */
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/* %term SetGT=18 */
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%term Malloc=19
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%term Free=20
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%term Alloca=21
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%term AllocaN=121 /* alloca with arg N */
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%term Load=22
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%term LoadIdx=122 /* load with index vector */
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%term Store=23
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%term GetElemPtr=24
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%term GetElemPtrIdx=124 /* getElemPtr with index vector */
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/* 25 is PHINode, which is never a real tree node */
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%term Cast=26 /* cast that will be ignored. others are made explicit */
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%term ToBoolTy=126
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%term ToUByteTy=127
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%term ToSByteTy=128
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%term ToUShortTy=129
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%term ToShortTy=130
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%term ToUIntTy=131
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%term ToIntTy=132
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%term ToULongTy=133
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%term ToLongTy=134
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%term ToFloatTy=135
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%term ToDoubleTy=136
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%term ToArrayTy=137
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%term ToPointerTy=138
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%term Call=27
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%term Shl=28
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%term Shr=29
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/* 30...46 are unused */
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/*
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* The foll. values should match the constants in InstrForest.h
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*/
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%term VRegList=97
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%term VReg=98
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%term Constant=99
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%term Label=100
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/* 50+i is a variant of i, as defined above */
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%%
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/*-----------------------------------------------------------------------*
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* The productions of the grammar.
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* Note that all chain rules are numbered 101 and above.
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* Also, a special case of production X is numbered 100+X.
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*-----------------------------------------------------------------------*/
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/*
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* The top-level statements
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*/
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stmt: Ret = 1 (3);
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stmt: RetValue(reg) = 2 (3);
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stmt: Store(reg,reg) = 3 (1);
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stmt: Store(reg,ptrreg) = 4 (1);
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stmt: BrUncond = 5 (2);
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stmt: BrCond(boolconst) = 6 (1); /* may save one instruction */
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stmt: BrCond(bool) = 7 (2);
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stmt: BrCond(boolreg) = 8 (2);
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stmt: Switch(reg) = 9 (3); /* cost = load + branch */
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stmt: reg = 111 (0);
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stmt: boolconst = 112 (0);
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stmt: bool = 113 (0);
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/*
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* List node used for nodes with more than 2 children
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*/
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reg: VRegList(reg,reg) = 10 (0);
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/*
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* The unary operators. We encode NOT and individual casts into
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* separate non-terminals to combine instructions for some cases:
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* Eg1: zdouble <- todouble(xfloat) * todouble(yfloat)
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* Eg2: c <- a AND (NOT b).
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* Note that the costs are counted for the individual non-terminals
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* below, not for reg.
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*/
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reg: not = 121 (0);
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reg: tobool = 122 (0);
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reg: toubyte = 123 (0);
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reg: tosbyte = 124 (0);
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reg: toushort = 125 (0);
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reg: toshort = 126 (0);
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reg: touint = 127 (0);
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reg: toint = 128 (0);
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reg: toulong = 129 (0);
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reg: tolong = 130 (0);
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reg: tofloat = 131 (0);
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reg: todouble = 132 (0);
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not: Not(reg) = 21 (1);
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tobool: ToBoolTy(reg) = 22 (1);
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toubyte: ToUByteTy(reg) = 23 (1);
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tosbyte: ToSByteTy(reg) = 24 (1);
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toushort: ToUShortTy(reg) = 25 (1);
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toshort: ToShortTy(reg) = 26 (1);
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touint: ToUIntTy(reg) = 27 (1);
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toint: ToIntTy(reg) = 28 (1);
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toulong: ToULongTy(reg) = 29 (1);
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tolong: ToLongTy(reg) = 30 (1);
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tofloat: ToFloatTy(reg) = 31 (1);
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todouble: ToDoubleTy(reg) = 32 (1);
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reg: ToArrayTy(reg) = 19 (1);
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reg: ToPointerTy(reg) = 20 (1);
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/*
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* The binary operators.
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*/
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reg: Add(reg,reg) = 33 (1);
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reg: Sub(reg,reg) = 34 (1);
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reg: Mul(reg,reg) = 35 (3);
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reg: Mul(todouble,todouble) = 135 (2); /* avoids 1-2 type converts */
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reg: Div(reg,reg) = 36 (6);
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reg: Rem(reg,reg) = 37 (6);
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reg: And(reg,reg) = 38 (1);
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reg: And(reg,not) = 138 (0); /* cost is counted for not */
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reg: Or (reg,reg) = 39 (1);
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reg: Or (reg,not) = 139 (0); /* cost is counted for not */
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reg: Xor(reg,reg) = 40 (1);
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reg: Xor(reg,not) = 140 (0); /* cost is counted for not */
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/*
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* The SetCC instructions and other boolean values
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*/
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boolconst: SetCC(reg,Constant) = 41 (1);
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bool: SetCC(reg,reg) = 42 (1);
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boolreg: VReg = 43 (0);
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/*
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* Memory access instructions
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*/
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reg: Load(reg) = 51 (3);
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reg: Load(ptrreg) = 52 (2); /* 1 counted for ptrreg */
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reg: LoadIdx(reg,reg) = 53 (3);
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reg: LoadIdx(ptrreg,reg) = 54 (2); /* 1 counted for ptrreg */
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reg: ptrreg = 155 (0);
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ptrreg: GetElemPtr(reg) = 55 (1);
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ptrreg: GetElemPtrIdx(reg,reg) = 56 (1);
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reg: Alloca = 57 (1);
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reg: AllocaN(reg) = 58 (1);
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/*
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* Other operators producing register values
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*/
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reg: Call = 61 (0);
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reg: Shl(reg,reg) = 62 (1);
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reg: Shr(reg,reg) = 63 (1);
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/*
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* Finally, leaf nodes of expression trees (other than boolreg)
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*/
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reg: VReg = 71 (0);
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reg: Constant = 72 (0);
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%%
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/*-----------------------------------------------------------------------*
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* The rest of this file provides code to print the cover produced
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* by BURG and information about computed tree cost and matches.
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* This code was taken from sample.gr provided with BURG.
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*-----------------------------------------------------------------------*/
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static char rcsid[] = "$Id$";
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#ifdef __STDC__
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void printcover(NODEPTR_TYPE p, int goalnt, int indent) {
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#else
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void printcover(p, goalnt, indent) NODEPTR_TYPE p; int goalnt; int indent; {
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#endif
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int eruleno = burm_rule(STATE_LABEL(p), goalnt);
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short *nts = burm_nts[eruleno];
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NODEPTR_TYPE kids[10];
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int i;
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if (eruleno == 0) {
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printf("no cover\n");
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return;
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}
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for (i = 0; i < indent; i++)
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printf(".");
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printf("%s\n", burm_string[eruleno]);
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burm_kids(p, eruleno, kids);
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for (i = 0; nts[i]; i++)
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printcover(kids[i], nts[i], indent+1);
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}
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#ifdef __STDC__
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void printtree(NODEPTR_TYPE p) {
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#else
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void printtree(p) NODEPTR_TYPE p; {
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#endif
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int op = burm_op_label(p);
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printf("%s", burm_opname[op]);
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switch (burm_arity[op]) {
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case 0:
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break;
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case 1:
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printf("(");
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printtree(burm_child(p, 0));
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printf(")");
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break;
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case 2:
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printf("(");
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printtree(burm_child(p, 0));
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printf(", ");
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printtree(burm_child(p, 1));
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printf(")");
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break;
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}
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}
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#ifdef __STDC__
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int treecost(NODEPTR_TYPE p, int goalnt, int costindex) {
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#else
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int treecost(p, goalnt, costindex) NODEPTR_TYPE p; int goalnt; int costindex; {
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#endif
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int eruleno = burm_rule(STATE_LABEL(p), goalnt);
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int cost = burm_cost[eruleno][costindex], i;
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short *nts = burm_nts[eruleno];
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NODEPTR_TYPE kids[10];
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burm_kids(p, eruleno, kids);
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for (i = 0; nts[i]; i++)
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cost += treecost(kids[i], nts[i], costindex);
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return cost;
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}
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#ifdef __STDC__
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void printMatches(NODEPTR_TYPE p) {
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#else
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void printMatches(p) NODEPTR_TYPE p; {
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#endif
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int nt;
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int eruleno;
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printf("Node 0x%lx= ", (unsigned long)p);
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printtree(p);
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printf(" matched rules:\n");
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for (nt = 1; burm_ntname[nt] != (char*)NULL; nt++)
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if ((eruleno = burm_rule(STATE_LABEL(p), nt)) != 0)
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printf("\t%s\n", burm_string[eruleno]);
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}
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@ -0,0 +1,56 @@
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// $Id$
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//***************************************************************************
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// File:
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// Sparc.cpp
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//
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// Purpose:
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//
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// History:
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// 7/15/01 - Vikram Adve - Created
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//**************************************************************************/
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//************************** System Include Files **************************/
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//*************************** User Include Files ***************************/
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#include "llvm/DerivedTypes.h"
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#include "llvm/Codegen/Sparc.h"
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//************************ Exported Constants ******************************/
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// Set external object describing the machine instructions
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//
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const MachineInstrInfo* TargetMachineInstrInfo = SparcMachineInstrInfo;
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//************************ Class Implementations **************************/
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//---------------------------------------------------------------------------
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// class UltraSparcMachine
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//
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// Purpose:
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// Machine description.
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//
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//---------------------------------------------------------------------------
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UltraSparc::UltraSparc()
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: TargetMachine()
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{
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optSizeForSubWordData = 4;
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intSize = 4;
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floatSize = 4;
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longSize = 8;
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doubleSize = 8;
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longDoubleSize = 16;
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pointerSize = 8;
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minMemOpWordSize = 8;
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maxAtomicMemOpWordSize = 8;
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machineInstrInfo = SparcMachineInstrInfo;
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zeroRegNum = 0; // %g0 always gives 0 on Sparc
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}
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//**************************************************************************/
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