forked from OSchip/llvm-project
AMDGPU: Precommit test showing extra instructions are introduced
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-no-signed-zeros-fp-math=true < %s | FileCheck %s
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; FIXME: This should be the same when the extra instructions are fixed
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; XUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-no-signed-zeros-fp-math=false < %s | FileCheck %s
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; no-signed-zeros-fp-math should not increase the number of
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; instructions emitted.
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define { double, double } @testfn(double %arg, double %arg1, double %arg2) {
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; CHECK-LABEL: testfn:
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; CHECK: ; %bb.0: ; %bb
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: v_add_f64 v[6:7], v[4:5], -v[0:1]
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; CHECK-NEXT: v_add_f64 v[4:5], v[0:1], -v[4:5]
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; CHECK-NEXT: v_add_f64 v[0:1], v[6:7], -v[2:3]
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; CHECK-NEXT: v_add_f64 v[2:3], -v[2:3], v[4:5]
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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bb:
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%tmp = fsub fast double 0.000000e+00, %arg1
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%tmp3 = fsub fast double %arg2, %arg
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%tmp4 = fadd fast double %tmp3, %tmp
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%tmp5 = fsub fast double %tmp, %tmp3
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%tmp6 = insertvalue { double, double } undef, double %tmp4, 0
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%tmp7 = insertvalue { double, double } %tmp6, double %tmp5, 1
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ret { double, double } %tmp7
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}
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