forked from OSchip/llvm-project
Add ConvertConstantToIntType() to unify all constant handling
that depends on machine register size. Moved insertCallerSavingCode() to PhyRegAlloc and moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all machine independent. Remove several dead functions. llvm-svn: 7392
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@ -21,7 +21,6 @@
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class LiveRange;
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class UltraSparc;
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class PhyRegAlloc;
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class Pass;
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enum SparcInstrSchedClass {
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@ -158,6 +157,19 @@ struct UltraSparcInstrInfo : public TargetInstrInfo {
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//
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virtual MachineOpCode getNOPOpCode() const { return V9::NOP; }
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// Get the value of an integral constant in the form that must
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// be put into the machine register. The specified constant is interpreted
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// as (i.e., converted if necessary to) the specified destination type. The
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// result is always returned as an uint64_t, since the representation of
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// int64_t and uint64_t are identical. The argument can be any known const.
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//
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// isValidConstant is set to true if a valid constant was found.
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//
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virtual uint64_t ConvertConstantToIntType(const TargetMachine &target,
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const Value *V,
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const Type *destType,
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bool &isValidConstant) const;
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// Create an instruction sequence to put the constant `val' into
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// the virtual register `dest'. `val' may be a Constant or a
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// GlobalValue, viz., the constant address of a global variable or function.
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@ -271,35 +283,9 @@ private:
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void suggestReg4CallAddr(MachineInstr *CallMI, LiveRangeInfo &LRI) const;
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void InitializeOutgoingArg(MachineInstr* CallMI, AddedInstrns *CallAI,
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PhyRegAlloc &PRA, LiveRange* LR,
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unsigned regType, unsigned RegClassID,
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int UniArgReg, unsigned int argNo,
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std::vector<MachineInstr *>& AddedInstrnsBefore)
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const;
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// Helper used by the all the getRegType() functions.
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int getRegTypeForClassAndType(unsigned regClassID, const Type* type) const;
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// Used to generate a copy instruction based on the register class of
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// value.
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//
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MachineInstr *cpValue2RegMI(Value *Val, unsigned DestReg,
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int RegType) const;
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// The following 2 methods are used to order the instructions addeed by
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// the register allocator in association with function calling. See
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// SparcRegInfo.cpp for more details
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//
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void moveInst2OrdVec(std::vector<MachineInstr *> &OrdVec,
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MachineInstr *UnordInst,
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PhyRegAlloc &PRA) const;
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void OrderAddedInstrns(std::vector<MachineInstr *> &UnordVec,
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std::vector<MachineInstr *> &OrdVec,
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PhyRegAlloc &PRA) const;
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public:
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// Type of registers available in Sparc. There can be several reg types
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// in the same class. For instace, the float reg class has Single/Double
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@ -382,16 +368,9 @@ public:
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void suggestReg4RetValue(MachineInstr *RetMI,
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LiveRangeInfo& LRI) const;
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void colorMethodArgs(const Function *Meth, LiveRangeInfo &LRI,
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AddedInstrns *FirstAI) const;
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// This method inserts the caller saving code for call instructions
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//
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void insertCallerSavingCode(std::vector<MachineInstr*>& instrnsBefore,
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std::vector<MachineInstr*>& instrnsAfter,
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MachineInstr *CallMI,
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const BasicBlock *BB,
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PhyRegAlloc &PRA ) const;
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void colorMethodArgs(const Function *Meth, LiveRangeInfo& LRI,
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std::vector<MachineInstr*>& InstrnsBefore,
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std::vector<MachineInstr*>& InstrnsAfter) const;
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// method used for printing a register for debugging purposes
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//
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@ -440,17 +419,6 @@ public:
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void cpValue2Value(Value *Src, Value *Dest,
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std::vector<MachineInstr*>& mvec) const;
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// To see whether a register is a volatile (i.e., whehter it must be
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// preserved acorss calls)
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//
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inline bool isRegVolatile(int RegClassID, int Reg) const {
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return MachineRegClassArr[RegClassID]->isRegVolatile(Reg);
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}
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inline bool modifiedByCall(int RegClassID, int Reg) const {
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return MachineRegClassArr[RegClassID]->modifiedByCall(Reg);
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}
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// Get the register type for a register identified different ways.
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// Note that getRegTypeForLR(LR) != getRegTypeForDataType(LR->getType())!
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// The reg class of a LR depends both on the Value types in it and whether
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@ -727,8 +695,6 @@ public:
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Pass* getEmitBytecodeToAsmPass(std::ostream &Out);
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};
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int64_t GetConstantValueAsSignedInt(const Value *V, bool &isValidConstant);
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Pass *getFunctionInfo(std::ostream &out);
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#endif
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