forked from OSchip/llvm-project
parent
a11693bc37
commit
6467858be1
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@ -919,17 +919,22 @@ void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
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MVT NVT = TLI.getTypeToTransformTo(VT);
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SDValue Src = N->getOperand(0);
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MVT SrcVT = Src.getValueType();
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bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
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// First do an SINT_TO_FP, whether the original was signed or unsigned.
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// When promoting partial word types to i32 we must honor the signedness,
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// though.
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if (SrcVT.bitsLE(MVT::i32)) {
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// The integer can be represented exactly in an f64.
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Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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MVT::i32, Src);
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Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
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Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
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} else {
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RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
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if (SrcVT.bitsLE(MVT::i64)) {
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Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
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Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND,
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MVT::i64, Src);
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LC = RTLIB::SINTTOFP_I64_PPCF128;
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} else if (SrcVT.bitsLE(MVT::i128)) {
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Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
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@ -943,7 +948,7 @@ void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
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Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
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}
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if (N->getOpcode() == ISD::SINT_TO_FP)
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if (isSigned)
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return;
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// Unsigned - fix up the SINT_TO_FP value just calculated.
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