forked from OSchip/llvm-project
[AArch64][v8.3a] Add LDRA '[xN]!' alias.
The instruction definition has been retroactively expanded to allow for an alias for '[xN, 0]!' as '[xN]!'. That wouldn't make sense on LDR, but does for LDRA.
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@ -1463,6 +1463,9 @@ multiclass AuthLoad<bit M, string asm, Operand opr> {
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def : InstAlias<asm # "\t$Rt, [$Rn]",
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(!cast<Instruction>(NAME # "indexed") GPR64:$Rt, GPR64sp:$Rn, 0)>;
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def : InstAlias<asm # "\t$Rt, [$wback]!",
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(!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0)>;
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}
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//---
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@ -306,3 +306,11 @@
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// CHECK-NEXT: ldrab x0, [x1] // encoding: [0x20,0x04,0xa0,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldrab x0, [x1]
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ldraa x0, [x1]!
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// CHECK-NEXT: ldraa x0, [x1]! // encoding: [0x20,0x0c,0x20,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldraa x0, [x1]!
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ldrab x0, [x1]!
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// CHECK-NEXT: ldrab x0, [x1]! // encoding: [0x20,0x0c,0xa0,0xf8]
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// CHECK-REQ: error: instruction requires: pa
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// CHECK-REQ-NEXT: ldrab x0, [x1]!
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@ -83,14 +83,6 @@
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# CHECK: retab
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# CHECK: eretaa
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# CHECK: eretab
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# CHECK: ldraa x0, [x1, #4088]
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# CHECK: ldraa x0, [x1, #-4096]
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# CHECK: ldrab x0, [x1, #4088]
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# CHECK: ldrab x0, [x1, #-4096]
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# CHECK: ldraa x0, [x1, #4088]!
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# CHECK: ldraa x0, [x1, #-4096]!
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# CHECK: ldrab x0, [x1, #4088]!
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# CHECK: ldrab x0, [x1, #-4096]!
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[0x1f,0x08,0x1f,0xd6]
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[0x1f,0x0c,0x1f,0xd6]
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[0x1f,0x08,0x3f,0xd6]
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@ -99,6 +91,15 @@
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[0xff,0x0f,0x5f,0xd6]
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[0xff,0x0b,0x9f,0xd6]
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[0xff,0x0f,0x9f,0xd6]
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# CHECK: ldraa x0, [x1, #4088]
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# CHECK: ldraa x0, [x1, #-4096]
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# CHECK: ldrab x0, [x1, #4088]
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# CHECK: ldrab x0, [x1, #-4096]
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# CHECK: ldraa x0, [x1, #4088]!
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# CHECK: ldraa x0, [x1, #-4096]!
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# CHECK: ldrab x0, [x1, #4088]!
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# CHECK: ldrab x0, [x1, #-4096]!
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[0x20,0xf4,0x3f,0xf8]
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[0x20,0x04,0x60,0xf8]
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[0x20,0xf4,0xbf,0xf8]
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@ -112,3 +113,8 @@
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# CHECK: ldrab x0, [x1]
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[0x20,0x04,0x20,0xf8]
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[0x20,0x04,0xa0,0xf8]
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# CHECK: ldraa x0, [x1]!
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# CHECK: ldrab x0, [x1]!
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[0x20,0x0c,0x20,0xf8]
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[0x20,0x0c,0xa0,0xf8]
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