forked from OSchip/llvm-project
parent
2a862cd6e1
commit
6423c29e14
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@ -393,6 +393,7 @@ let isCall = 1,
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T1Special<{1,1,1,?}>; // A6.2.3 & A8.6.24;
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// ARMv4T
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// FIXME: Should be a pseudo.
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let isCodeGenOnly = 1 in
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def tBX : TIx2<{?,?,?,?,?}, {?,?}, ?,
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(outs), (ins tGPR:$func, variable_ops), IIC_Br,
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@ -445,6 +446,7 @@ let isCall = 1,
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// ARMv4T
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let isCodeGenOnly = 1 in
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// FIXME: Should be a pseudo.
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def tBXr9 : TIx2<{?,?,?,?,?}, {?,?}, ?,
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(outs), (ins tGPR:$func, variable_ops), IIC_Br,
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"mov\tlr, pc\n\tbx\t$func",
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