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[mlir] Squash LLVM_ArmNeon dialect into ArmNeon 

The two dialects are largely redundant. The former was introduced as a mirror
of the latter operating on LLVM dialect types. This is no longer necessary
since the LLVM dialect operates on built-in types. Combine the two dialects.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D98060
This commit is contained in:
Alex Zinenko 2021-03-05 19:19:06 +01:00
parent 3c19b4f34d
commit 6410ee0d09
25 changed files with 84 additions and 281 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
mlir/include/mlir/Conversion/ArmNeonToLLVM/ArmNeonToLLVM.h
View File

@ -1,23 +0,0 @@
//===- ArmNeonToLLVM.h - Conversion Patterns from ArmNeon to LLVM ---------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef MLIR_CONVERSION_ARMNEONTOLLVM_ARMNEONTOLLVM_H_
#define MLIR_CONVERSION_ARMNEONTOLLVM_ARMNEONTOLLVM_H_
namespace mlir {
class LLVMTypeConverter;
class OwningRewritePatternList;
/// Collect a set of patterns to convert from theArmNeon dialect to LLVM.
void populateArmNeonToLLVMConversionPatterns(
LLVMTypeConverter &converter, OwningRewritePatternList &patterns);
} // namespace mlir
#endif // MLIR_CONVERSION_ARMNEONTOLLVM_ARMNEONTOLLVM_H_

40
mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
View File

@ -13,6 +13,7 @@
#ifndef ARMNEON_OPS
#define ARMNEON_OPS
include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
include "mlir/Interfaces/SideEffectInterfaces.td"
//===----------------------------------------------------------------------===//
@ -22,20 +23,43 @@ include "mlir/Interfaces/SideEffectInterfaces.td"
def ArmNeon_Dialect : Dialect {
let name = "arm_neon";
let cppNamespace = "::mlir::arm_neon";
// Note: this does not need to depend on LLVMDialect as long as functions in
// this dialect (such as canonicalization) do not produce entities belonging
// to the LLVMDialect (ops or types).
}
//===----------------------------------------------------------------------===//
// ArmNeon op definitions
//===----------------------------------------------------------------------===//
class ArmNeon_Op<string mnemonic, list<OpTrait> traits = []> :
Op<ArmNeon_Dialect, mnemonic, traits> {}
// ArmNeon dialect op that corresponds (and is convertible to) an LLVM IR
// intrinsic.
class ArmNeon_IntrOp<string mnemonic, list<int> overloadedResults,
list<int> overloadedOperands, int numResults,
list<OpTrait> traits = [], bit requiresAccessGroup = 0>
: LLVM_IntrOpBase</*dialect=*/ArmNeon_Dialect,
/*opName=*/mnemonic,
/*enumName=*/"aarch64_neon_" # !subst(".", "_", mnemonic),
/*overloadedResults=*/overloadedResults,
/*overloadedOperands=*/overloadedOperands,
/*traits=*/traits,
/*numResults=*/numResults,
/*requiresAccessGroup=*/requiresAccessGroup>;
def SMullOp : ArmNeon_Op<"smull", [NoSideEffect,
AllTypesMatch<["a", "b"]>,
TypesMatchWith<
"res has same vector shape and element bitwidth scaled by 2 as a",
"a", "res", "$_self.cast<VectorType>().scaleElementBitwidth(2)">]> {
// ArmNeon dialect op that corresponds to an LLVM IR intrinsic with one
// overloaded result.
class ArmNeon_OverloadedOneResultIntrOp<string mnemonic,
list<OpTrait> traits = []>
: ArmNeon_IntrOp<mnemonic, [0], [], 1, traits>;
def SMullOp : ArmNeon_OverloadedOneResultIntrOp<"smull", [
NoSideEffect,
AllTypesMatch<["a", "b"]>,
TypesMatchWith<
"res has same vector shape and element bitwidth scaled by 2 as a",
"a", "res", "$_self.cast<VectorType>().scaleElementBitwidth(2)">
]> {
let summary = "smull roundscale op";
let description = [{
Signed Multiply Long (vector). This instruction multiplies corresponding
@ -46,6 +70,7 @@ def SMullOp : ArmNeon_Op<"smull", [NoSideEffect,
Source:
https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics
}];
// Supports either:
// (vector<8xi8>, vector<8xi8>) -> (vector<8xi16>)
// (vector<4xi16>, vector<4xi16>) -> (vector<4xi32>)
@ -57,4 +82,5 @@ def SMullOp : ArmNeon_Op<"smull", [NoSideEffect,
"$a `,` $b attr-dict `:` type($a) `to` type($res)";
}
#endif // ARMNEON_OPS

4
mlir/include/mlir/Dialect/ArmNeon/CMakeLists.txt
View File

@ -1,2 +1,6 @@
add_mlir_dialect(ArmNeon arm_neon)
add_mlir_doc(ArmNeon -gen-dialect-doc ArmNeon Dialects/)
set(LLVM_TARGET_DEFINITIONS ArmNeon.td)
mlir_tablegen(ArmNeonConversions.inc -gen-llvmir-conversions)
add_public_tablegen_target(MLIRArmNeonConversionsIncGen)

6
mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
View File

@ -36,12 +36,6 @@ set(LLVM_TARGET_DEFINITIONS LLVMAVX512.td)
mlir_tablegen(LLVMAVX512Conversions.inc -gen-llvmir-conversions)
add_public_tablegen_target(MLIRLLVMAVX512ConversionsIncGen)
add_mlir_dialect(LLVMArmNeon llvm_arm_neon LLVMArmNeon)
add_mlir_doc(LLVMArmNeon -gen-dialect-doc LLVMArmNeon Dialects/)
set(LLVM_TARGET_DEFINITIONS LLVMArmNeon.td)
mlir_tablegen(LLVMArmNeonConversions.inc -gen-llvmir-conversions)
add_public_tablegen_target(MLIRLLVMArmNeonConversionsIncGen)
add_mlir_dialect(LLVMArmSVE llvm_arm_sve LLVMArmSVE)
add_mlir_doc(LLVMArmSVE -gen-dialect-doc LLVMArmSve Dialects/)
set(LLVM_TARGET_DEFINITIONS LLVMArmSVE.td)

43
mlir/include/mlir/Dialect/LLVMIR/LLVMArmNeon.td
View File

@ -1,43 +0,0 @@
//===-- LLVMArmNeon.td - LLVMArmNeon dialect op definitions *- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the basic operations for the LLVMArmNeon dialect.
//
//===----------------------------------------------------------------------===//
#ifndef LLVMIR_ARMNEON_OPS
#define LLVMIR_ARMNEON_OPS
include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
//===----------------------------------------------------------------------===//
// LLVMArmNeon dialect definition
//===----------------------------------------------------------------------===//
def LLVMArmNeon_Dialect : Dialect {
let name = "llvm_arm_neon";
let cppNamespace = "::mlir::LLVM";
}
//----------------------------------------------------------------------------//
// MLIR LLVMArmNeon intrinsics using the MLIR LLVM Dialect type system
//----------------------------------------------------------------------------//
class LLVMArmNeon_IntrBinaryOverloadedOp<string mnemonic, list<OpTrait> traits = []> :
LLVM_IntrOpBase</*Dialect dialect=*/LLVMArmNeon_Dialect,
/*string opName=*/mnemonic,
/*string enumName=*/"aarch64_neon_" # !subst(".", "_", mnemonic),
/*list<int> overloadedResults=*/[0],
/*list<int> overloadedOperands=*/[], // defined by result overload
/*list<OpTrait> traits=*/traits,
/*int numResults=*/1>;
def LLVM_aarch64_arm_neon_smull :
LLVMArmNeon_IntrBinaryOverloadedOp<"smull">, Arguments<(ins LLVM_Type, LLVM_Type)>;
#endif // ARMNEON_OPS

24
mlir/include/mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h
View File

@ -1,24 +0,0 @@
//===- LLVMArmNeonDialect.h - MLIR Dialect for LLVMArmNeon ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the Target dialect for LLVMArmNeon in MLIR.
//
//===----------------------------------------------------------------------===//
#ifndef MLIR_DIALECT_LLVMIR_LLVMARMNEONDIALECT_H_
#define MLIR_DIALECT_LLVMIR_LLVMARMNEONDIALECT_H_
#include "mlir/IR/Dialect.h"
#include "mlir/IR/OpDefinition.h"
#define GET_OP_CLASSES
#include "mlir/Dialect/LLVMIR/LLVMArmNeon.h.inc"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h.inc"
#endif // MLIR_DIALECT_LLVMIR_LLVMARMNEONDIALECT_H_

2
mlir/include/mlir/InitAllDialects.h
View File

@ -22,7 +22,6 @@
#include "mlir/Dialect/Complex/IR/Complex.h"
#include "mlir/Dialect/GPU/GPUDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMAVX512Dialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/Dialect/LLVMIR/NVVMDialect.h"
@ -58,7 +57,6 @@ inline void registerAllDialects(DialectRegistry &registry) {
gpu::GPUDialect,
LLVM::LLVMAVX512Dialect,
LLVM::LLVMDialect,
LLVM::LLVMArmNeonDialect,
LLVM::LLVMArmSVEDialect,
linalg::LinalgDialect,
math::MathDialect,

4
mlir/include/mlir/Target/LLVMIR/Dialect/All.h
View File

@ -14,8 +14,8 @@
#ifndef MLIR_TARGET_LLVMIR_DIALECT_ALL_H
#define MLIR_TARGET_LLVMIR_DIALECT_ALL_H
#include "mlir/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMAVX512/LLVMAVX512ToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMArmNeon/LLVMArmNeonToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMArmSVE/LLVMArmSVEToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.h"
@ -28,8 +28,8 @@ class DialectRegistry;
/// Registers all dialects that can be translated to LLVM IR and the
/// corresponding translation interfaces.
static inline void registerAllToLLVMIRTranslations(DialectRegistry &registry) {
registerArmNeonDialectTranslation(registry);
registerLLVMAVX512DialectTranslation(registry);
registerLLVMArmNeonDialectTranslation(registry);
registerLLVMArmSVEDialectTranslation(registry);
registerLLVMDialectTranslation(registry);
registerNVVMDialectTranslation(registry);

15
mlir/include/mlir/Target/LLVMIR/Dialect/LLVMArmNeon/LLVMArmNeonToLLVMIRTranslation.h → mlir/include/mlir/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.h
View File

@ -1,4 +1,4 @@
//===- LLVMArmNeonToLLVMIRTranslation.h - LLVMArmNeon to LLVMIR -*- C++ -*-===//
//===- ArmNeonToLLVMIRTranslation.h - ArmNeon to LLVMIR ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@ -6,13 +6,12 @@
//
//===----------------------------------------------------------------------===//
//
// This provides registration calls for LLVMArmNeon dialect to LLVM IR
// translation.
// This provides registration calls for ArmNeon dialect to LLVM IR translation.
//
//===----------------------------------------------------------------------===//
#ifndef MLIR_TARGET_LLVMIR_DIALECT_LLVMARMNEON_LLVMARMNEONTOLLVMIRTRANSLATION_H
#define MLIR_TARGET_LLVMIR_DIALECT_LLVMARMNEON_LLVMARMNEONTOLLVMIRTRANSLATION_H
#ifndef MLIR_TARGET_LLVMIR_DIALECT_ARMNEON_ARMNEONTOLLVMIRTRANSLATION_H
#define MLIR_TARGET_LLVMIR_DIALECT_ARMNEON_ARMNEONTOLLVMIRTRANSLATION_H
namespace mlir {
@ -21,12 +20,12 @@ class MLIRContext;
/// Register the LLVMArmNeon dialect and the translation from it to the LLVM IR
/// in the given registry;
void registerLLVMArmNeonDialectTranslation(DialectRegistry &registry);
void registerArmNeonDialectTranslation(DialectRegistry &registry);
/// Register the LLVMArmNeon dialect and the translation from it in the registry
/// associated with the given context.
void registerLLVMArmNeonDialectTranslation(MLIRContext &context);
void registerArmNeonDialectTranslation(MLIRContext &context);
} // namespace mlir
#endif // MLIR_TARGET_LLVMIR_DIALECT_LLVMARMNEON_LLVMARMNEONTOLLVMIRTRANSLATION_H
#endif // MLIR_TARGET_LLVMIR_DIALECT_ARMNEON_ARMNEONTOLLVMIRTRANSLATION_H

31
mlir/lib/Conversion/ArmNeonToLLVM/ArmNeonToLLVM.cpp
View File

@ -1,31 +0,0 @@
//===- ArmNeonToLLVM.cpp - ArmNeon to the LLVM dialect --------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "mlir/Conversion/ArmNeonToLLVM/ArmNeonToLLVM.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/Dialect/StandardOps/IR/Ops.h"
#include "mlir/Dialect/Vector/VectorOps.h"
#include "mlir/IR/BuiltinOps.h"
#include "mlir/IR/PatternMatch.h"
using namespace mlir;
using namespace mlir::vector;
using namespace mlir::arm_neon;
using SMullOpLowering =
OneToOneConvertToLLVMPattern<SMullOp, LLVM::aarch64_arm_neon_smull>;
/// Populate the given list with patterns that convert from ArmNeon to LLVM.
void mlir::populateArmNeonToLLVMConversionPatterns(
LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
patterns.insert<SMullOpLowering>(converter);
}

19
mlir/lib/Conversion/ArmNeonToLLVM/CMakeLists.txt
View File

@ -1,19 +0,0 @@
add_mlir_conversion_library(MLIRArmNeonToLLVM
ArmNeonToLLVM.cpp
ADDITIONAL_HEADER_DIRS
${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/ArmNeonToLLVM
DEPENDS
MLIRConversionPassIncGen
LINK_COMPONENTS
Core
LINK_LIBS PUBLIC
MLIRArmNeon
MLIRLLVMArmNeon
MLIRLLVMIR
MLIRStandardToLLVM
MLIRTransforms
)

1
mlir/lib/Conversion/CMakeLists.txt
View File

@ -1,5 +1,4 @@
add_subdirectory(AffineToStandard)
add_subdirectory(ArmNeonToLLVM)
add_subdirectory(AsyncToLLVM)
add_subdirectory(AVX512ToLLVM)
add_subdirectory(ComplexToLLVM)

1
mlir/lib/Conversion/PassDetail.h
View File

@ -29,7 +29,6 @@ class GPUModuleOp;
} // end namespace gpu
namespace LLVM {
class LLVMArmNeonDialect;
class LLVMArmSVEDialect;
class LLVMAVX512Dialect;
class LLVMDialect;

2
mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
View File

@ -14,10 +14,8 @@ add_mlir_conversion_library(MLIRVectorToLLVM
LINK_LIBS PUBLIC
MLIRArmNeon
MLIRArmNeonToLLVM
MLIRAVX512
MLIRAVX512ToLLVM
MLIRLLVMArmNeon
MLIRLLVMAVX512
MLIRArmSVE
MLIRArmSVEToLLVM

11
mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
View File

@ -11,7 +11,6 @@
#include "../PassDetail.h"
#include "mlir/Conversion/AVX512ToLLVM/ConvertAVX512ToLLVM.h"
#include "mlir/Conversion/ArmNeonToLLVM/ArmNeonToLLVM.h"
#include "mlir/Conversion/ArmSVEToLLVM/ArmSVEToLLVM.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
@ -19,7 +18,6 @@
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMAVX512Dialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/Dialect/StandardOps/IR/Ops.h"
@ -43,7 +41,7 @@ struct LowerVectorToLLVMPass
void getDependentDialects(DialectRegistry &registry) const override {
registry.insert<LLVM::LLVMDialect>();
if (enableArmNeon)
registry.insert<LLVM::LLVMArmNeonDialect>();
registry.insert<arm_neon::ArmNeonDialect>();
if (enableArmSVE)
registry.insert<LLVM::LLVMArmSVEDialect>();
if (enableAVX512)
@ -78,9 +76,10 @@ void LowerVectorToLLVMPass::runOnOperation() {
target.addLegalDialect<StandardOpsDialect>();
target.addLegalOp<UnrealizedConversionCastOp>();
if (enableArmNeon) {
target.addLegalDialect<LLVM::LLVMArmNeonDialect>();
target.addIllegalDialect<arm_neon::ArmNeonDialect>();
populateArmNeonToLLVMConversionPatterns(converter, patterns);
// TODO: we may or may not want to include in-dialect lowering to
// LLVM-compatible operations here. So far, all operations in the dialect
// can be translated to LLVM IR so there is no conversion necessary.
target.addLegalDialect<arm_neon::ArmNeonDialect>();
}
if (enableArmSVE) {
target.addLegalDialect<LLVM::LLVMArmSVEDialect>();

21
mlir/lib/Dialect/LLVMIR/CMakeLists.txt
View File

@ -50,27 +50,6 @@ add_mlir_dialect_library(MLIRLLVMAVX512
MLIRSideEffectInterfaces
)
add_mlir_dialect_library(MLIRLLVMArmNeon
IR/LLVMArmNeonDialect.cpp
ADDITIONAL_HEADER_DIRS
${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/LLVMIR
DEPENDS
MLIRLLVMArmNeonIncGen
MLIRLLVMArmNeonConversionsIncGen
intrinsics_gen
LINK_COMPONENTS
AsmParser
Core
LINK_LIBS PUBLIC
MLIRIR
MLIRLLVMIR
MLIRSideEffectInterfaces
)
add_mlir_dialect_library(MLIRLLVMArmSVE
IR/LLVMArmSVEDialect.cpp

31
mlir/lib/Dialect/LLVMIR/IR/LLVMArmNeonDialect.cpp
View File

@ -1,31 +0,0 @@
//===- LLVMArmNeonDialect.cpp - MLIR LLVMArmNeon ops implementation -------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the LLVMArmNeon dialect and its operations.
//
//===----------------------------------------------------------------------===//
#include "llvm/IR/IntrinsicsAArch64.h"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/IR/Builders.h"
#include "mlir/IR/OpImplementation.h"
#include "mlir/IR/TypeUtilities.h"
using namespace mlir;
void LLVM::LLVMArmNeonDialect::initialize() {
addOperations<
#define GET_OP_LIST
#include "mlir/Dialect/LLVMIR/LLVMArmNeon.cpp.inc"
>();
}
#define GET_OP_CLASSES
#include "mlir/Dialect/LLVMIR/LLVMArmNeon.cpp.inc"

2
mlir/lib/Target/LLVMIR/CMakeLists.txt
View File

@ -36,7 +36,7 @@ add_mlir_translation_library(MLIRToLLVMIRTranslationRegistration
ConvertToLLVMIR.cpp
LINK_LIBS PUBLIC
MLIRLLVMArmNeonToLLVMIRTranslation
MLIRArmNeonToLLVMIRTranslation
MLIRLLVMArmSVEToLLVMIRTranslation
MLIRLLVMAVX512ToLLVMIRTranslation
MLIRLLVMToLLVMIRTranslation

24
mlir/lib/Target/LLVMIR/Dialect/LLVMArmNeon/LLVMArmNeonToLLVMIRTranslation.cpp → mlir/lib/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.cpp
View File

@ -1,4 +1,4 @@
//===- LLVMArmNeonToLLVMIRTranslation.cpp - LLVMArmNeon to LLVM IR --------===//
//===- ArmNeonToLLVMIRTranslation.cpp - Translate ArmNeon to LLVM IR ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@ -6,13 +6,13 @@
//
//===----------------------------------------------------------------------===//
//
// This file implements a translation between the MLIR LLVMArmNeon dialect and
// This file implements a translation between the MLIR ArmNeon dialect and
// LLVM IR.
//
//===----------------------------------------------------------------------===//
#include "mlir/Target/LLVMIR/Dialect/LLVMArmNeon/LLVMArmNeonToLLVMIRTranslation.h"
#include "mlir/Dialect/LLVMIR/LLVMArmNeonDialect.h"
#include "mlir/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.h"
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/IR/Operation.h"
#include "mlir/Target/LLVMIR/ModuleTranslation.h"
@ -25,7 +25,7 @@ using namespace mlir::LLVM;
namespace {
/// Implementation of the dialect interface that converts operations belonging
/// to the LLVMArmNeon dialect to LLVM IR.
class LLVMArmNeonDialectLLVMIRTranslationInterface
class ArmNeonDialectLLVMIRTranslationInterface
: public LLVMTranslationDialectInterface {
public:
using LLVMTranslationDialectInterface::LLVMTranslationDialectInterface;
@ -36,21 +36,21 @@ public:
convertOperation(Operation *op, llvm::IRBuilderBase &builder,
LLVM::ModuleTranslation &moduleTranslation) const final {
Operation &opInst = *op;
#include "mlir/Dialect/LLVMIR/LLVMArmNeonConversions.inc"
#include "mlir/Dialect/ArmNeon/ArmNeonConversions.inc"
return failure();
}
};
} // end namespace
void mlir::registerLLVMArmNeonDialectTranslation(DialectRegistry &registry) {
registry.insert<LLVM::LLVMArmNeonDialect>();
registry.addDialectInterface<LLVM::LLVMArmNeonDialect,
LLVMArmNeonDialectLLVMIRTranslationInterface>();
void mlir::registerArmNeonDialectTranslation(DialectRegistry &registry) {
registry.insert<arm_neon::ArmNeonDialect>();
registry.addDialectInterface<arm_neon::ArmNeonDialect,
ArmNeonDialectLLVMIRTranslationInterface>();
}
void mlir::registerLLVMArmNeonDialectTranslation(MLIRContext &context) {
void mlir::registerArmNeonDialectTranslation(MLIRContext &context) {
DialectRegistry registry;
registerLLVMArmNeonDialectTranslation(registry);
registerArmNeonDialectTranslation(registry);
context.appendDialectRegistry(registry);
}

16
mlir/lib/Target/LLVMIR/Dialect/ArmNeon/CMakeLists.txt Normal file
View File

@ -0,0 +1,16 @@
add_mlir_translation_library(MLIRArmNeonToLLVMIRTranslation
ArmNeonToLLVMIRTranslation.cpp
DEPENDS
MLIRArmNeonConversionsIncGen
LINK_COMPONENTS
Core
LINK_LIBS PUBLIC
MLIRArmNeon
MLIRIR
MLIRLLVMIR
MLIRSupport
MLIRTargetLLVMIRExport
)

2
mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
View File

@ -1,4 +1,4 @@
add_subdirectory(LLVMArmNeon)
add_subdirectory(ArmNeon)
add_subdirectory(LLVMArmSVE)
add_subdirectory(LLVMAVX512)
add_subdirectory(LLVMIR)

16
mlir/lib/Target/LLVMIR/Dialect/LLVMArmNeon/CMakeLists.txt
View File

@ -1,16 +0,0 @@
add_mlir_translation_library(MLIRLLVMArmNeonToLLVMIRTranslation
LLVMArmNeonToLLVMIRTranslation.cpp
DEPENDS
MLIRLLVMArmNeonConversionsIncGen
LINK_COMPONENTS
Core
LINK_LIBS PUBLIC
MLIRIR
MLIRLLVMArmNeon
MLIRLLVMIR
MLIRSupport
MLIRTargetLLVMIRExport
)

20
mlir/test/Conversion/ArmNeonToLLVM/convert-to-llvm.mlir
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@ -1,20 +0,0 @@
// RUN: mlir-opt %s -convert-vector-to-llvm="enable-arm-neon" | mlir-opt | FileCheck %s
// CHECK-LABEL: arm_neon_smull
func @arm_neon_smull(%a: vector<8xi8>, %b: vector<8xi8>)
-> (vector<8xi16>, vector<4xi32>, vector<2xi64>) {
// CHECK: arm_neon.smull{{.*}}: (vector<8xi8>, vector<8xi8>) -> vector<8xi16>
%0 = arm_neon.smull %a, %b : vector<8xi8> to vector<8xi16>
%00 = vector.extract_strided_slice %0 {offsets = [3], sizes = [4], strides = [1]}:
vector<8xi16> to vector<4xi16>
// CHECK: arm_neon.smull{{.*}}: (vector<4xi16>, vector<4xi16>) -> vector<4xi32>
%1 = arm_neon.smull %00, %00 : vector<4xi16> to vector<4xi32>
%11 = vector.extract_strided_slice %1 {offsets = [1], sizes = [2], strides = [1]}:
vector<4xi32> to vector<2xi32>
// CHECK: arm_neon.smull{{.*}}: (vector<2xi32>, vector<2xi32>) -> vector<2xi64>
%2 = arm_neon.smull %11, %11 : vector<2xi32> to vector<2xi64>
return %0, %1, %2 : vector<8xi16>, vector<4xi32>, vector<2xi64>
}

6
mlir/test/Target/arm-neon.mlir
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@ -4,16 +4,16 @@
llvm.func @arm_neon_smull(%arg0: vector<8xi8>, %arg1: vector<8xi8>) -> !llvm.struct<(vector<8xi16>, vector<4xi32>, vector<2xi64>)> {
// CHECK: %[[V0:.*]] = call <8 x i16> @llvm.aarch64.neon.smull.v8i16(<8 x i8> %{{.*}}, <8 x i8> %{{.*}})
// CHECK-NEXT: %[[V00:.*]] = shufflevector <8 x i16> %3, <8 x i16> %[[V0]], <4 x i32> <i32 3, i32 4, i32 5, i32 6>
%0 = "llvm_arm_neon.smull"(%arg0, %arg1) : (vector<8xi8>, vector<8xi8>) -> vector<8xi16>
%0 = arm_neon.smull %arg0, %arg1 : vector<8xi8> to vector<8xi16>
%1 = llvm.shufflevector %0, %0 [3, 4, 5, 6] : vector<8xi16>, vector<8xi16>
// CHECK-NEXT: %[[V1:.*]] = call <4 x i32> @llvm.aarch64.neon.smull.v4i32(<4 x i16> %[[V00]], <4 x i16> %[[V00]])
// CHECK-NEXT: %[[V11:.*]] = shufflevector <4 x i32> %[[V1]], <4 x i32> %[[V1]], <2 x i32> <i32 1, i32 2>
%2 = "llvm_arm_neon.smull"(%1, %1) : (vector<4xi16>, vector<4xi16>) -> vector<4xi32>
%2 = arm_neon.smull %1, %1 : vector<4xi16> to vector<4xi32>
%3 = llvm.shufflevector %2, %2 [1, 2] : vector<4xi32>, vector<4xi32>
// CHECK-NEXT: %[[V1:.*]] = call <2 x i64> @llvm.aarch64.neon.smull.v2i64(<2 x i32> %[[V11]], <2 x i32> %[[V11]])
%4 = "llvm_arm_neon.smull"(%3, %3) : (vector<2xi32>, vector<2xi32>) -> vector<2xi64>
%4 = arm_neon.smull %3, %3 : vector<2xi32> to vector<2xi64>
%5 = llvm.mlir.undef : !llvm.struct<(vector<8xi16>, vector<4xi32>, vector<2xi64>)>
%6 = llvm.insertvalue %0, %5[0] : !llvm.struct<(vector<8xi16>, vector<4xi32>, vector<2xi64>)>

1
mlir/test/mlir-opt/commandline.mlir
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@ -10,7 +10,6 @@
// CHECK-NEXT: gpu
// CHECK-NEXT: linalg
// CHECK-NEXT: llvm
// CHECK-NEXT: llvm_arm_neon
// CHECK-NEXT: llvm_arm_sve
// CHECK-NEXT: llvm_avx512
// CHECK-NEXT: math