From 6400c03e6a7aff8e7c8c41d31c6c1d123d48aa5b Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Mon, 9 Apr 2018 13:53:41 +0000 Subject: [PATCH] Revert r329403 "[llvm-mca] Do not separate iterations with a newline in the timeline view." This made AArch64/CortexA57/direct-branch.s fail on Windows, e.g. http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/11251 > Also, update a few tests to minimize the diff in D45369. > No functional change intended. llvm-svn: 329569 --- .../llvm-mca/AArch64/CortexA57/direct-branch.s | 15 ++++++++------- .../tools/llvm-mca/AArch64/Exynos/direct-branch.s | 6 +++--- .../AArch64/Exynos/scheduler-queue-usage.s | 4 ++-- llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s | 4 ++-- llvm/test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s | 2 +- .../tools/llvm-mca/X86/BtVer2/register-files-1.s | 11 +++++------ .../tools/llvm-mca/X86/BtVer2/register-files-2.s | 10 +++++----- .../tools/llvm-mca/X86/BtVer2/register-files-3.s | 2 +- .../tools/llvm-mca/X86/BtVer2/register-files-4.s | 6 +++--- llvm/tools/llvm-mca/TimelineView.cpp | 2 +- 10 files changed, 31 insertions(+), 31 deletions(-) diff --git a/llvm/test/tools/llvm-mca/AArch64/CortexA57/direct-branch.s b/llvm/test/tools/llvm-mca/AArch64/CortexA57/direct-branch.s index 35403bd30e44..4bacbc17d4d2 100644 --- a/llvm/test/tools/llvm-mca/AArch64/CortexA57/direct-branch.s +++ b/llvm/test/tools/llvm-mca/AArch64/CortexA57/direct-branch.s @@ -1,4 +1,4 @@ -# RUN: llvm-mca -march=aarch64 -mcpu=cortex-a57 -iterations=600 -timeline -timeline-max-iterations=4 < %s | FileCheck %s +# RUN: llvm-mca -march=aarch64 -mcpu=cortex-a57 -iterations=600 -timeline < %s | FileCheck %s b t @@ -42,12 +42,13 @@ # CHECK: Timeline view: -# CHECK: Index 0123456 +# CHECK-NEXT: 012 +# CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DeER .. b t -# CHECK-NEXT: [1,0] D=eER.. b t -# CHECK-NEXT: [2,0] D==eER. b t -# CHECK-NEXT: [3,0] .D==eER b t +# CHECK: [0,0] DeER . . . b t +# CHECK: [1,0] D=eER. . . b t +# CHECK: [2,0] D==eER . . b t +# CHECK: [3,0] .D==eER . . b t # CHECK: Average Wait times (based on the timeline view): @@ -57,4 +58,4 @@ # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 4 2.2 2.2 0.0 b t +# CHECK-NEXT: 0. 10 4.3 4.3 0.0 b t diff --git a/llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s b/llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s index 81f6c6a562be..eb0a78374ede 100644 --- a/llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s +++ b/llvm/test/tools/llvm-mca/AArch64/Exynos/direct-branch.s @@ -1,5 +1,5 @@ -# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=300 -timeline -timeline-max-iterations=3 -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=M3 -# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=300 -timeline -timeline-max-iterations=3 -resource-pressure=false < %s | FileCheck %s -check-prefix=ALL -check-prefix=M1 +# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=300 -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=M3 +# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=300 -timeline < %s | FileCheck %s -check-prefix=ALL -check-prefix=M1 b t @@ -34,4 +34,4 @@ # ALL-NEXT: [3]: Average time elapsed from WB until retire stage # ALL: [0] [1] [2] [3] -# ALL-NEXT: 0. 3 0.0 0.0 0.0 b t +# ALL-NEXT: 0. 10 0.0 0.0 0.0 b t diff --git a/llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s b/llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s index 0a856098b84a..3fc553f23205 100644 --- a/llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s +++ b/llvm/test/tools/llvm-mca/AArch64/Exynos/scheduler-queue-usage.s @@ -1,5 +1,5 @@ -# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=1 -verbose -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=ALL -# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=1 -verbose -resource-pressure=false -instruction-info=false < %s | FileCheck %s -check-prefix=ALL +# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m3 -iterations=1 -verbose < %s | FileCheck %s -check-prefix=ALL +# RUN: llvm-mca -march=aarch64 -mcpu=exynos-m1 -iterations=1 -verbose < %s | FileCheck %s -check-prefix=ALL b t diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s b/llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s index 3634c539e027..7028bb37aaea 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/dot-product.s @@ -59,10 +59,10 @@ vhaddps %xmm3, %xmm3, %xmm4 # CHECK: [0,0] DeeER. . . vmulps %xmm0, %xmm1, %xmm2 # CHECK-NEXT: [0,1] D==eeeER . . vhaddps %xmm2, %xmm2, %xmm3 # CHECK-NEXT: [0,2] .D====eeeER . vhaddps %xmm3, %xmm3, %xmm4 -# CHECK-NEXT: [1,0] .DeeE-----R . vmulps %xmm0, %xmm1, %xmm2 +# CHECK: [1,0] .DeeE-----R . vmulps %xmm0, %xmm1, %xmm2 # CHECK-NEXT: [1,1] . D=eeeE---R . vhaddps %xmm2, %xmm2, %xmm3 # CHECK-NEXT: [1,2] . D====eeeER . vhaddps %xmm3, %xmm3, %xmm4 -# CHECK-NEXT: [2,0] . DeeE-----R . vmulps %xmm0, %xmm1, %xmm2 +# CHECK: [2,0] . DeeE-----R . vmulps %xmm0, %xmm1, %xmm2 # CHECK-NEXT: [2,1] . D====eeeER . vhaddps %xmm2, %xmm2, %xmm3 # CHECK-NEXT: [2,2] . D======eeeER vhaddps %xmm3, %xmm3, %xmm4 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s b/llvm/test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s index e60933b54c65..d2a53036de27 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/pipes-fpu.s @@ -87,7 +87,7 @@ vsqrtps %ymm0, %ymm2 # CHECK-NEXT: [0,5] . DeeeeeeeeeeeeeeeeeeeeeER . . . . . . . . . vsqrtps %xmm0, %xmm2 # CHECK-NEXT: [0,6] . DeeeE-----------------R . . . . . . . . . vaddps %ymm0, %ymm1, %ymm2 # CHECK-NEXT: [0,7] . D===================eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeER . vsqrtps %ymm0, %ymm2 -# CHECK-NEXT: [1,0] . .DeeeeE--------------------------------------------------------R . vpmulld %xmm0, %xmm1, %xmm2 +# CHECK: [1,0] . .DeeeeE--------------------------------------------------------R . vpmulld %xmm0, %xmm1, %xmm2 # CHECK-NEXT: [1,1] . . DeE-----------------------------------------------------------R. vpand %xmm0, %xmm1, %xmm2 # CHECK-NEXT: [1,2] . . DeeeE--------------------------------------------------------R. vcvttps2dq %xmm0, %xmm2 # CHECK-NEXT: [1,3] . . DeeE----------------------------------------------------------R vpclmulqdq $0, %xmm0, %xmm1, %xmm2 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-1.s index 0b155076fe41..d7fd25fbe460 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-1.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-1.s @@ -1,4 +1,4 @@ -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=5 -verbose -instruction-info=false -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=5 -verbose -register-file-stats -timeline < %s | FileCheck %s vaddps %xmm0, %xmm0, %xmm0 vmulps %xmm0, %xmm0, %xmm0 @@ -34,14 +34,13 @@ vmulps %xmm0, %xmm0, %xmm0 # CHECK: Timeline view: # CHECK-NEXT: 0123456789 # CHECK-NEXT: Index 0123456789 01234567 - # CHECK: [0,0] DeeeER . . . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [0,1] D===eeER . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,0] .D====eeeER . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [1,0] .D====eeeER . . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [1,1] .D=======eeER . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,0] . D========eeeER . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [2,0] . D========eeeER . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [2,1] . D===========eeER . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,0] . D============eeeER . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [3,0] . D============eeeER . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [3,1] . D===============eeER . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,0] . D================eeeER . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [4,0] . D================eeeER . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [4,1] . D===================eeER vmulps %xmm0, %xmm0, %xmm0 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s index 95ea8e0cc381..03785f7d3f99 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-2.s @@ -1,4 +1,4 @@ -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -register-file-size=5 -iterations=5 -verbose -instruction-info=false -register-file-stats -timeline < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -register-file-size=5 -iterations=5 -verbose -register-file-stats -timeline < %s | FileCheck %s vaddps %xmm0, %xmm0, %xmm0 vmulps %xmm0, %xmm0, %xmm0 @@ -36,11 +36,11 @@ vmulps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: Index 0123456789 01234567 # CHECK: [0,0] DeeeER . . . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [0,1] D===eeER . . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,0] .D====eeeER . . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [1,0] .D====eeeER . . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [1,1] .D=======eeER . . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,0] . D========eeeER . . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [2,0] . D========eeeER . . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [2,1] . D========eeER . . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [3,0] . . D========eeeER . . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [3,0] . . D========eeeER . . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [3,1] . . D========eeER . . vmulps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [4,0] . . . D========eeeER . vaddps %xmm0, %xmm0, %xmm0 +# CHECK: [4,0] . . . D========eeeER . vaddps %xmm0, %xmm0, %xmm0 # CHECK-NEXT: [4,1] . . . D========eeER vmulps %xmm0, %xmm0, %xmm0 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-3.s b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-3.s index e58f15b6df2f..447143f82811 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-3.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-3.s @@ -46,4 +46,4 @@ idiv %eax # CHECK-NEXT: Index 0123456789 0123456789 0123456789 # CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax -# CHECK-NEXT: [1,0] . . . . . . DeeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax +# CHECK: [1,0] . . . . . . DeeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-4.s b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-4.s index 52ece90603d6..86c508af2e41 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-4.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/register-files-4.s @@ -1,4 +1,4 @@ -# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=22 -verbose -register-file-stats -resource-pressure=false -timeline -timeline-max-iterations=3 < %s | FileCheck %s +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=22 -verbose -register-file-stats -timeline -timeline-max-iterations=3 < %s | FileCheck %s idiv %eax @@ -45,5 +45,5 @@ idiv %eax # CHECK-NEXT: 0123456789 0123456789 0123456789 01234567 # CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 # CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . . . . . . idivl %eax -# CHECK-NEXT: [1,0] .D========================eeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax -# CHECK-NEXT: [2,0] . D================================================eeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax +# CHECK: [1,0] .D========================eeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax +# CHECK: [2,0] . D================================================eeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax diff --git a/llvm/tools/llvm-mca/TimelineView.cpp b/llvm/tools/llvm-mca/TimelineView.cpp index 02388bb38381..9419fe4b4a6e 100644 --- a/llvm/tools/llvm-mca/TimelineView.cpp +++ b/llvm/tools/llvm-mca/TimelineView.cpp @@ -155,7 +155,7 @@ void TimelineView::printTimelineViewEntry(raw_string_ostream &OS, const TimelineViewEntry &Entry, unsigned Iteration, unsigned SourceIndex) const { - if (Iteration == 0 && SourceIndex == 0) + if (SourceIndex == 0) OS << '\n'; OS << '[' << Iteration << ',' << SourceIndex << "]\t"; for (unsigned I = 0, E = Entry.CycleDispatched; I < E; ++I)