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[SDAG] fix bug in ComputeNumSignBits of target constant 

The loop below the changed line assumes that the element
width of the target constant is the same as the element
width of the loaded value, but that is not always true.

We could try harder to do some kind of min/max calc even
if the sizes don't match, but that can be another patch
if needed. This fixes #53401 (miscompile) and does not
change the motivating cases added when this analysis
was introduced:
ad298f86b7
This commit is contained in:
Sanjay Patel 2022-01-26 09:59:51 -05:00
parent d70d997799
commit 63daea8b35
2 changed files with 4 additions and 1 deletions
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3
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -4282,7 +4282,8 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
// scalar cases. // scalar cases.
Type *CstTy = Cst->getType(); Type *CstTy = Cst->getType();
if (CstTy->isVectorTy() && if (CstTy->isVectorTy() &&
(NumElts * VTBits) == CstTy->getPrimitiveSizeInBits()) { (NumElts * VTBits) == CstTy->getPrimitiveSizeInBits() &&
VTBits == CstTy->getScalarSizeInBits()) {
Tmp = VTBits; Tmp = VTBits;
for (unsigned i = 0; i != NumElts; ++i) { for (unsigned i = 0; i != NumElts; ++i) {
if (!DemandedElts[i]) if (!DemandedElts[i])

2
llvm/test/CodeGen/X86/vselect-constants.ll
View File

@ -298,6 +298,8 @@ define i32 @wrong_min_signbits(<2 x i16> %x) {
; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,0,0,0] ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,0,0,0]
; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0 ; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpsllw $15, %xmm0, %xmm0
; AVX-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX-NEXT: vpblendvb %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0 ; AVX-NEXT: vpblendvb %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
; AVX-NEXT: vmovd %xmm0, %eax ; AVX-NEXT: vmovd %xmm0, %eax
; AVX-NEXT: retq ; AVX-NEXT: retq