diff --git a/llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll b/llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll index 82e2e045cf2d..b498e42ed6dc 100644 --- a/llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll +++ b/llvm/test/Analysis/CostModel/X86/alternate-shuffle-cost.ll @@ -1,9 +1,11 @@ -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 -cost-model -analyze | FileCheck %s -check-prefixes=CHECK,SSE2 -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 -cost-model -analyze | FileCheck %s -check-prefixes=CHECK,SSSE3 -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 -cost-model -analyze | FileCheck %s -check-prefixes=CHECK,SSE41 -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx -cost-model -analyze | FileCheck %s -check-prefixes=CHECK,AVX -; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 -cost-model -analyze | FileCheck %s -check-prefixes=CHECK,AVX2 - +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+ssse3 | FileCheck %s -check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE41 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+xop,+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+xop,+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 ; Verify the cost model for alternate shuffles. @@ -12,336 +14,509 @@ ; 64-bit packed float vectors (v2f32) are widened to type v4f32. define <2 x i32> @test_v2i32(<2 x i32> %a, <2 x i32> %b) { +; CHECK-LABEL: 'test_v2i32' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i32> %1 +; %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i32': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <2 x float> @test_v2f32(<2 x float> %a, <2 x float> %b) { +; SSE2-LABEL: 'test_v2f32' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; SSSE3-LABEL: 'test_v2f32' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; SSE41-LABEL: 'test_v2f32' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; AVX-LABEL: 'test_v2f32' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f32': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <2 x i32> @test_v2i32_2(<2 x i32> %a, <2 x i32> %b) { +; CHECK-LABEL: 'test_v2i32_2' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i32> %1 +; %1 = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> ret <2 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i32_2': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <2 x float> @test_v2f32_2(<2 x float> %a, <2 x float> %b) { +; SSE2-LABEL: 'test_v2f32_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; SSSE3-LABEL: 'test_v2f32_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; SSE41-LABEL: 'test_v2f32_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; +; AVX-LABEL: 'test_v2f32_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x float> %1 +; %1 = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> ret <2 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f32_2': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - ; Test shuffles on packed vectors of two elements. define <2 x i64> @test_v2i64(<2 x i64> %a, <2 x i64> %b) { +; CHECK-LABEL: 'test_v2i64' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %1 +; %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i64': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <2 x double> @test_v2f64(<2 x double> %a, <2 x double> %b) { +; CHECK-LABEL: 'test_v2f64' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x double> %1 +; %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f64': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <2 x i64> @test_v2i64_2(<2 x i64> %a, <2 x i64> %b) { +; CHECK-LABEL: 'test_v2i64_2' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %1 +; %1 = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> ret <2 x i64> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2i64_2': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <2 x double> @test_v2f64_2(<2 x double> %a, <2 x double> %b) { +; CHECK-LABEL: 'test_v2f64_2' +; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x double> %1 +; %1 = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> ret <2 x double> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v2f64_2': -; SSE2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector ; Test shuffles on packed vectors of four elements. define <4 x i32> @test_v4i32(<4 x i32> %a, <4 x i32> %b) { +; SSE2-LABEL: 'test_v4i32' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; SSSE3-LABEL: 'test_v4i32' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; SSE41-LABEL: 'test_v4i32' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; AVX-LABEL: 'test_v4i32' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i32': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x i32> @test_v4i32_2(<4 x i32> %a, <4 x i32> %b) { +; SSE2-LABEL: 'test_v4i32_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; SSSE3-LABEL: 'test_v4i32_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; SSE41-LABEL: 'test_v4i32_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; +; AVX-LABEL: 'test_v4i32_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %1 +; %1 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> ret <4 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i32_2': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x float> @test_v4f32(<4 x float> %a, <4 x float> %b) { +; SSE2-LABEL: 'test_v4f32' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; SSSE3-LABEL: 'test_v4f32' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; SSE41-LABEL: 'test_v4f32' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; AVX-LABEL: 'test_v4f32' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f32': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x float> @test_v4f32_2(<4 x float> %a, <4 x float> %b) { +; SSE2-LABEL: 'test_v4f32_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; SSSE3-LABEL: 'test_v4f32_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; SSE41-LABEL: 'test_v4f32_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; +; AVX-LABEL: 'test_v4f32_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x float> %1 +; %1 = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> ret <4 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f32_2': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <4 x i64> @test_v4i64(<4 x i64> %a, <4 x i64> %b) { +; SSE-LABEL: 'test_v4i64' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 +; +; AVX-LABEL: 'test_v4i64' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 +; %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> ret <4 x i64> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i64': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x i64> @test_v4i64_2(<4 x i64> %a, <4 x i64> %b) { +; SSE-LABEL: 'test_v4i64_2' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 +; +; AVX-LABEL: 'test_v4i64_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i64> %1 +; %1 = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> ret <4 x i64> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4i64_2': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x double> @test_v4f64(<4 x double> %a, <4 x double> %b) { +; SSE-LABEL: 'test_v4f64' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 +; +; AVX-LABEL: 'test_v4f64' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 +; %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f64': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <4 x double> @test_v4f64_2(<4 x double> %a, <4 x double> %b) { +; SSE-LABEL: 'test_v4f64_2' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 +; +; AVX-LABEL: 'test_v4f64_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x double> %1 +; %1 = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> ret <4 x double> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v4f64_2': -; SSE2: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - ; Test shuffles on packed vectors of eight elements. + define <8 x i16> @test_v8i16(<8 x i16> %a, <8 x i16> %b) { +; SSE2-LABEL: 'test_v8i16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; SSSE3-LABEL: 'test_v8i16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; SSE41-LABEL: 'test_v8i16' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; AVX-LABEL: 'test_v8i16' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16': -; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <8 x i16> @test_v8i16_2(<8 x i16> %a, <8 x i16> %b) { +; SSE2-LABEL: 'test_v8i16_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; SSSE3-LABEL: 'test_v8i16_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; SSE41-LABEL: 'test_v8i16_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; +; AVX-LABEL: 'test_v8i16_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i16> %1 +; %1 = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> ret <8 x i16> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i16_2': -; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <8 x i32> @test_v8i32(<8 x i32> %a, <8 x i32> %b) { +; SSE2-LABEL: 'test_v8i32' +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; SSSE3-LABEL: 'test_v8i32' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; SSE41-LABEL: 'test_v8i32' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; AVX-LABEL: 'test_v8i32' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> ret <8 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i32': -; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <8 x i32> @test_v8i32_2(<8 x i32> %a, <8 x i32> %b) { +; SSE2-LABEL: 'test_v8i32_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; SSSE3-LABEL: 'test_v8i32_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; SSE41-LABEL: 'test_v8i32_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; +; AVX-LABEL: 'test_v8i32_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x i32> %1 +; %1 = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> ret <8 x i32> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8i32_2': -; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <8 x float> @test_v8f32(<8 x float> %a, <8 x float> %b) { +; SSE2-LABEL: 'test_v8f32' +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; SSSE3-LABEL: 'test_v8f32' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; SSE41-LABEL: 'test_v8f32' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; AVX-LABEL: 'test_v8f32' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8f32': -; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <8 x float> @test_v8f32_2(<8 x float> %a, <8 x float> %b) { +; SSE2-LABEL: 'test_v8f32_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; SSSE3-LABEL: 'test_v8f32_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; SSE41-LABEL: 'test_v8f32_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; +; AVX-LABEL: 'test_v8f32_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <8 x float> %1 +; %1 = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> ret <8 x float> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v8f32_2': -; SSE2: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 4 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - ; Test shuffles on packed vectors of sixteen elements. + define <16 x i8> @test_v16i8(<16 x i8> %a, <16 x i8> %b) { +; SSE2-LABEL: 'test_v16i8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; SSSE3-LABEL: 'test_v16i8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; SSE41-LABEL: 'test_v16i8' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; AVX-LABEL: 'test_v16i8' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8': -; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <16 x i8> @test_v16i8_2(<16 x i8> %a, <16 x i8> %b) { +; SSE2-LABEL: 'test_v16i8_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; SSSE3-LABEL: 'test_v16i8_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; SSE41-LABEL: 'test_v16i8_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; +; AVX-LABEL: 'test_v16i8_2' +; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> +; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i8> %1 +; %1 = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> ret <16 x i8> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i8_2': -; SSE2: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <16 x i16> @test_v16i16(<16 x i16> %a, <16 x i16> %b) { +; SSE2-LABEL: 'test_v16i16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; SSSE3-LABEL: 'test_v16i16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; SSE41-LABEL: 'test_v16i16' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; AVX1-LABEL: 'test_v16i16' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; AVX2-LABEL: 'test_v16i16' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> ret <16 x i16> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16': -; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <16 x i16> @test_v16i16_2(<16 x i16> %a, <16 x i16> %b) { +; SSE2-LABEL: 'test_v16i16_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; SSSE3-LABEL: 'test_v16i16_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; SSE41-LABEL: 'test_v16i16_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; AVX1-LABEL: 'test_v16i16_2' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; +; AVX2-LABEL: 'test_v16i16_2' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <16 x i16> %1 +; %1 = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> ret <16 x i16> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v16i16_2': -; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector define <32 x i8> @test_v32i8(<32 x i8> %a, <32 x i8> %b) { +; SSE2-LABEL: 'test_v32i8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; SSSE3-LABEL: 'test_v32i8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; SSE41-LABEL: 'test_v32i8' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; AVX1-LABEL: 'test_v32i8' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; AVX2-LABEL: 'test_v32i8' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> ret <32 x i8> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8': -; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - define <32 x i8> @test_v32i8_2(<32 x i8> %a, <32 x i8> %b) { +; SSE2-LABEL: 'test_v32i8_2' +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; SSSE3-LABEL: 'test_v32i8_2' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; SSE41-LABEL: 'test_v32i8_2' +; SSE41-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; SSE41-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; AVX1-LABEL: 'test_v32i8_2' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; +; AVX2-LABEL: 'test_v32i8_2' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <32 x i8> %1 +; %1 = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> ret <32 x i8> %1 } -; CHECK: Printing analysis 'Cost Model Analysis' for function 'test_v32i8_2': -; SSE2: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSSE3: Cost Model: {{.*}} 6 for instruction: %1 = shufflevector -; SSE41: Cost Model: {{.*}} 2 for instruction: %1 = shufflevector -; AVX: Cost Model: {{.*}} 3 for instruction: %1 = shufflevector -; AVX2: Cost Model: {{.*}} 1 for instruction: %1 = shufflevector - diff --git a/llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll b/llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll index 43bd8718ac49..d6fc5931b3bd 100644 --- a/llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll +++ b/llvm/test/Analysis/CostModel/X86/shuffle-broadcast.ll @@ -1,166 +1,233 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSSE3 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+ssse3 | FileCheck %s -check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,AVX512 ; ; Verify the cost model for broadcast shuffles. ; -; CHECK-LABEL: 'test_vXf64' define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> %src512) { - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 2 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer - ret void } -; CHECK-LABEL: 'test_vXi64' define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512) { - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 2 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer - ret void } -; CHECK-LABEL: 'test_vXf32' define void @test_vXf32(<2 x float> %src64, <4 x float> %src128, <8 x float> %src256, <16 x float> %src512) { - ; SSE: cost of 1 {{.*}} %V64 = shufflevector - ; AVX: cost of 1 {{.*}} %V64 = shufflevector - ; AVX512: cost of 1 {{.*}} %V64 = shufflevector +; SSE-LABEL: 'test_vXf32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 2 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer - ret void } -; CHECK-LABEL: 'test_vXi32' define void @test_vXi32(<2 x i32> %src64, <4 x i32> %src128, <8 x i32> %src256, <16 x i32> %src512) { - ; SSE: cost of 1 {{.*}} %V64 = shufflevector - ; AVX: cost of 1 {{.*}} %V64 = shufflevector - ; AVX512: cost of 1 {{.*}} %V64 = shufflevector +; SSE-LABEL: 'test_vXi32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer - - ; SSE: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 2 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer - ret void } -; CHECK-LABEL: 'test_vXi16' define void @test_vXi16(<8 x i16> %src128, <16 x i16> %src256, <32 x i16> %src512) { - ; SSE2: cost of 2 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi16' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi16' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi16' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi16' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer - - ; SSE2: cost of 2 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V256 = shufflevector - ; SSE42: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 3 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer - - ; SSE2: cost of 2 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V512 = shufflevector - ; SSE42: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 3 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer - ret void } -; CHECK-LABEL: 'test_vXi8' define void @test_vXi8(<16 x i8> %src128, <32 x i8> %src256, <64 x i8> %src512) { - ; SSE2: cost of 3 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi8' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi8' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi8' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi8' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer - - ; SSE2: cost of 3 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V256 = shufflevector - ; SSE42: cost of 1 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer - - ; SSE2: cost of 3 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V512 = shufflevector - ; SSE42: cost of 1 {{.*}} %V512 = shufflevector - ; AVX1: cost of 2 {{.*}} %V512 = shufflevector - ; AVX2: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer - ret void } diff --git a/llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll b/llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll index 8be9f4626deb..c12f53c740f9 100644 --- a/llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll +++ b/llvm/test/Analysis/CostModel/X86/shuffle-reverse.ll @@ -1,174 +1,257 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSSE3 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VBMI +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+ssse3 | FileCheck %s -check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512VBMI ; ; Verify the cost model for reverse shuffles. ; -; CHECK-LABEL: 'test_vXf64' define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> %src512) { - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> - - ; SSE: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> - - ; SSE: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 4 {{.*}} %V512 = shufflevector - ; AVX2: cost of 2 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> - ret void } -; CHECK-LABEL: 'test_vXi64' define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512) { - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> - - ; SSE: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> - - ; SSE: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 4 {{.*}} %V512 = shufflevector - ; AVX2: cost of 2 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> - ret void } -; CHECK-LABEL: 'test_vXf32' define void @test_vXf32(<2 x float> %src64, <4 x float> %src128, <8 x float> %src256, <16 x float> %src512) { - ; SSE: cost of 1 {{.*}} %V64 = shufflevector - ; AVX: cost of 1 {{.*}} %V64 = shufflevector - ; AVX512: cost of 1 {{.*}} %V64 = shufflevector +; SSE-LABEL: 'test_vXf32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> - - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> - - ; SSE: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> - - ; SSE: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 4 {{.*}} %V512 = shufflevector - ; AVX2: cost of 2 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXi32' define void @test_vXi32(<2 x i32> %src64, <4 x i32> %src128, <8 x i32> %src256, <16 x i32> %src512) { - ; SSE: cost of 1 {{.*}} %V64 = shufflevector - ; AVX: cost of 1 {{.*}} %V64 = shufflevector - ; AVX512: cost of 1 {{.*}} %V64 = shufflevector +; SSE-LABEL: 'test_vXi32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> - - ; SSE: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> - - ; SSE: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 2 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> - - ; SSE: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 4 {{.*}} %V512 = shufflevector - ; AVX2: cost of 2 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXi16' define void @test_vXi16(<8 x i16> %src128, <16 x i16> %src256, <32 x i16> %src512) { - ; SSE2: cost of 3 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi16' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi16' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi16' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi16' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi16' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi16' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> - - ; SSE2: cost of 6 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V256 = shufflevector - ; SSE42: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 2 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 2 {{.*}} %V256 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> - - ; SSE2: cost of 12 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 4 {{.*}} %V512 = shufflevector - ; SSE42: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 4 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 4 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> - ret void } -; CHECK-LABEL: 'test_vXi8' define void @test_vXi8(<16 x i8> %src128, <32 x i8> %src256, <64 x i8> %src512) { - ; SSE2: cost of 9 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; AVX: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi8' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi8' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi8' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi8' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi8' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi8' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> - - ; SSE2: cost of 18 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V256 = shufflevector - ; SSE42: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 2 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 2 {{.*}} %V256 = shufflevector - ; AVX512BW: cost of 2 {{.*}} %V256 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> - - ; SSE2: cost of 36 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 4 {{.*}} %V512 = shufflevector - ; SSE42: cost of 4 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 4 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 4 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 2 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> - ret void } diff --git a/llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll b/llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll index 96f94f4b2887..f42965031876 100644 --- a/llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll +++ b/llvm/test/Analysis/CostModel/X86/shuffle-single-src.ll @@ -1,247 +1,306 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSSE3 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+xop | FileCheck %s -check-prefix=CHECK -check-prefix=XOP -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VBMI +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+ssse3 | FileCheck %s -check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+xop | FileCheck %s -check-prefixes=CHECK,XOP +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512VBMI ; ; Verify the cost model for 1 src shuffles ; -; CHECK-LABEL: 'test_vXf64' define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> %src512, <16 x double> %src1024) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXf64' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> - - ; SSE2: cost of 2 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V256 = shufflevector - ; SSE42: cost of 2 {{.*}} %V256 = shufflevector - ; XOP: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 3 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> - - ; SSE2: cost of 12 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 12 {{.*}} %V512 = shufflevector - ; SSE42: cost of 12 {{.*}} %V512 = shufflevector - ; XOP: cost of 8 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 6 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> - - ; SSE2: cost of 56 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 56 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 56 {{.*}} %V1024 = shufflevector - ; XOP: cost of 48 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 48 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 36 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 2 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <16 x double> %src1024, <16 x double> undef, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXi64' define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi64' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> - - ; SSE2: cost of 2 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V256 = shufflevector - ; SSE42: cost of 2 {{.*}} %V256 = shufflevector - ; XOP: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 3 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> - - ; SSE2: cost of 12 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 12 {{.*}} %V512 = shufflevector - ; SSE42: cost of 12 {{.*}} %V512 = shufflevector - ; XOP: cost of 8 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 6 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> - ret void } -; CHECK-LABEL: 'test_vXf32' define void @test_vXf32(<4 x float> %src128, <8 x float> %src256, <16 x float> %src512) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXf32' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> - - ; SSE2: cost of 4 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 4 {{.*}} %V256 = shufflevector - ; SSE42: cost of 4 {{.*}} %V256 = shufflevector - ; XOP: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> - - ; SSE2: cost of 24 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 24 {{.*}} %V512 = shufflevector - ; SSE42: cost of 24 {{.*}} %V512 = shufflevector - ; XOP: cost of 8 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 6 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXi32' define void @test_vXi32(<4 x i32> %src128, <8 x i32> %src256, <16 x i32> %src512, <32 x i32> %src1024) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi32' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi32' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> - - ; SSE2: cost of 4 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 4 {{.*}} %V256 = shufflevector - ; SSE42: cost of 4 {{.*}} %V256 = shufflevector - ; XOP: cost of 2 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> - - ; SSE2: cost of 24 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 24 {{.*}} %V512 = shufflevector - ; SSE42: cost of 24 {{.*}} %V512 = shufflevector - ; XOP: cost of 8 {{.*}} %V512 = shufflevector - ; AVX1: cost of 8 {{.*}} %V512 = shufflevector - ; AVX2: cost of 6 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> - - ; SSE2: cost of 112 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 112 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 112 {{.*}} %V1024 = shufflevector - ; XOP: cost of 48 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 48 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 36 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 2 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> undef, <32 x i32> ret void } -; CHECK-LABEL: 'test_vXi16' define void @test_vXi16(<8 x i16> %src128, <16 x i16> %src256, <32 x i16> %src512, <64 x i16> %src1024) { - - ; SSE2: cost of 5 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512F: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 448 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 168 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi16' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 168 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi16' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 108 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi16' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 180 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi16' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi16' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi16' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi16' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> - - ; SSE2: cost of 16 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 6 {{.*}} %V256 = shufflevector - ; SSE42: cost of 6 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 8 {{.*}} %V256 = shufflevector - ; AVX2: cost of 4 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 4 {{.*}} %V256 = shufflevector - ; AVX512BW cost of 1 {{.*}} %V256 = shufflevector - ; AVX512VBMI cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> - - ; SSE2: cost of 96 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 36 {{.*}} %V512 = shufflevector - ; SSE42: cost of 36 {{.*}} %V512 = shufflevector - ; XOP: cost of 18 {{.*}} %V512 = shufflevector - ; AVX1: cost of 30 {{.*}} %V512 = shufflevector - ; AVX2: cost of 14 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 14 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> - - ; SSE2: cost of 448 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 168 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 168 {{.*}} %V1024 = shufflevector - ; XOP: cost of 108 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 180 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512F: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512BW: cost of 2 {{.*}} %V1024 = shufflevector - ; AVX512VBMI: cost of 2 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> undef, <64 x i32> ret void } -; CHECK-LABEL: 'test_vXi8' define void @test_vXi8(<16 x i8> %src128, <32 x i8> %src256, <64 x i8> %src512) { - ; SSE2: cost of 10 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 26 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 156 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi8' +; SSE42-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi8' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi8' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi8' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi8' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi8' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi8' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> - - ; SSE2: cost of 26 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 6 {{.*}} %V256 = shufflevector - ; SSE42: cost of 6 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 8 {{.*}} %V256 = shufflevector - ; AVX2: cost of 4 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 4 {{.*}} %V256 = shufflevector - ; AVX512BW: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> - - ; SSE2: cost of 156 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 36 {{.*}} %V512 = shufflevector - ; SSE42: cost of 36 {{.*}} %V512 = shufflevector - ; XOP: cost of 18 {{.*}} %V512 = shufflevector - ; AVX1: cost of 30 {{.*}} %V512 = shufflevector - ; AVX2: cost of 14 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 14 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 8 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> - ret void } diff --git a/llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll b/llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll index 628e7cabc1e1..33eef4effb65 100644 --- a/llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll +++ b/llvm/test/Analysis/CostModel/X86/shuffle-two-src.ll @@ -1,270 +1,318 @@ -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSSE3 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+xop | FileCheck %s -check-prefix=CHECK -check-prefix=XOP -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2 -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW -; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VBMI +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+ssse3 | FileCheck %s -check-prefixes=CHECK,SSE,SSSE3 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+sse4.2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+xop | FileCheck %s -check-prefixes=CHECK,XOP +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2 +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW +; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -cost-model -analyze -mattr=+avx512f,+avx512bw,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512VBMI ; ; Verify the cost model for 2 src shuffles ; -; CHECK-LABEL: 'test_vXf64' define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> %src512, <16 x double> %src1024, <2 x double> %src128_1, <4 x double> %src256_1, <8 x double> %src512_1, <16 x double> %src1024_1) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 120 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXf64' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x double> %src128, <2 x double> %src128_1, <2 x i32> - - ; SSE2: cost of 6 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 6 {{.*}} %V256 = shufflevector - ; SSE42: cost of 6 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x double> %src256, <4 x double> %src256_1, <4 x i32> - - ; SSE2: cost of 28 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 28 {{.*}} %V512 = shufflevector - ; SSE42: cost of 28 {{.*}} %V512 = shufflevector - ; XOP: cost of 24 {{.*}} %V512 = shufflevector - ; AVX1: cost of 24 {{.*}} %V512 = shufflevector - ; AVX2: cost of 18 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x double> %src512, <8 x double> %src512_1, <8 x i32> - - ; SSE2: cost of 120 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 120 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 120 {{.*}} %V1024 = shufflevector - ; XOP: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 6 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <16 x double> %src1024, <16 x double> %src1024_1, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXi64' define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512, <16 x i64> %src1024, <2 x i64> %src128_1, <4 x i64> %src256_1, <8 x i64> %src512_1, <16 x i64> %src1024_1) { - - ; SSE2: cost of 1 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 1 {{.*}} %V128 = shufflevector - ; SSE42: cost of 1 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 1 {{.*}} %V128 = shufflevector - ; AVX2: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi64' +; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 120 for instruction: %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi64' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi64' +; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi64' +; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi64' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <2 x i64> %src128, <2 x i64> %src128_1, <2 x i32> - - ; SSE2: cost of 6 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 6 {{.*}} %V256 = shufflevector - ; SSE42: cost of 6 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <4 x i64> %src256, <4 x i64> %src256_1, <4 x i32> - - ; SSE2: cost of 28 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 28 {{.*}} %V512 = shufflevector - ; SSE42: cost of 28 {{.*}} %V512 = shufflevector - ; XOP: cost of 24 {{.*}} %V512 = shufflevector - ; AVX1: cost of 24 {{.*}} %V512 = shufflevector - ; AVX2: cost of 18 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <8 x i64> %src512, <8 x i64> %src512_1, <8 x i32> - - ; SSE2: cost of 120 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 120 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 120 {{.*}} %V1024 = shufflevector - ; XOP: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 6 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <16 x i64> %src1024, <16 x i64> %src1024_1, <16 x i32> - ret void } -; CHECK-LABEL: 'test_vXf32' define void @test_vXf32(<4 x float> %src128, <8 x float> %src256, <16 x float> %src512, <32 x float> %src1024, <4 x float> %src128_1, <8 x float> %src256_1, <16 x float> %src512_1, <32 x float> %src1024_1) { - - ; SSE2: cost of 2 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V128 = shufflevector - ; SSE42: cost of 2 {{.*}} %V128 = shufflevector - ; XOP: cost of 2 {{.*}} %V128 = shufflevector - ; AVX1: cost of 2 {{.*}} %V128 = shufflevector - ; AVX2: cost of 2 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXf32' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 240 for instruction: %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXf32' +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXf32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXf32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXf32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <4 x float> %src128, <4 x float> %src128_1, <4 x i32> - - ; SSE2: cost of 12 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 12 {{.*}} %V256 = shufflevector - ; SSE42: cost of 12 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x float> %src256, <8 x float> %src256_1, <8 x i32> - - ; SSE2: cost of 56 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 56 {{.*}} %V512 = shufflevector - ; SSE42: cost of 56 {{.*}} %V512 = shufflevector - ; XOP: cost of 24 {{.*}} %V512 = shufflevector - ; AVX1: cost of 24 {{.*}} %V512 = shufflevector - ; AVX2: cost of 18 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x float> %src512, <16 x float> %src512_1, <16 x i32> - - ; SSE2: cost of 240 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 240 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 240 {{.*}} %V1024 = shufflevector - ; XOP: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 6 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <32 x float> %src1024, <32 x float> %src1024_1, <32 x i32> - ret void } -; CHECK-LABEL: 'test_vXi32' define void @test_vXi32(<4 x i32> %src128, <8 x i32> %src256, <16 x i32> %src512, <32 x i32> %src1024, <4 x i32> %src128_1, <8 x i32> %src256_1, <16 x i32> %src512_1, <32 x i32> %src1024_1) { - - ; SSE2: cost of 2 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 2 {{.*}} %V128 = shufflevector - ; SSE42: cost of 2 {{.*}} %V128 = shufflevector - ; XOP: cost of 2 {{.*}} %V128 = shufflevector - ; AVX1: cost of 2 {{.*}} %V128 = shufflevector - ; AVX2: cost of 2 {{.*}} %V128 = shufflevector - ; AVX512: cost of 1 {{.*}} %V128 = shufflevector +; SSE-LABEL: 'test_vXi32' +; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 240 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> +; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi32' +; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi32' +; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi32' +; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512-LABEL: 'test_vXi32' +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> +; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <4 x i32> %src128, <4 x i32> %src128_1, <4 x i32> - - ; SSE2: cost of 12 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 12 {{.*}} %V256 = shufflevector - ; SSE42: cost of 12 {{.*}} %V256 = shufflevector - ; XOP: cost of 4 {{.*}} %V256 = shufflevector - ; AVX1: cost of 4 {{.*}} %V256 = shufflevector - ; AVX2: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <8 x i32> %src256, <8 x i32> %src256_1, <8 x i32> - - ; SSE2: cost of 56 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 56 {{.*}} %V512 = shufflevector - ; SSE42: cost of 56 {{.*}} %V512 = shufflevector - ; XOP: cost of 24 {{.*}} %V512 = shufflevector - ; AVX1: cost of 24 {{.*}} %V512 = shufflevector - ; AVX2: cost of 18 {{.*}} %V512 = shufflevector - ; AVX512: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <16 x i32> %src512, <16 x i32> %src512_1, <16 x i32> - - ; SSE2: cost of 240 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 240 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 240 {{.*}} %V1024 = shufflevector - ; XOP: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 112 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 84 {{.*}} %V1024 = shufflevector - ; AVX512: cost of 6 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <32 x i32> %src1024, <32 x i32> %src1024_1, <32 x i32> - ret void } -; CHECK-LABEL: 'test_vXi16' define void @test_vXi16(<8 x i16> %src128, <16 x i16> %src256, <32 x i16> %src512, <64 x i16> %src1024, <8 x i16> %src128_1, <16 x i16> %src256_1, <32 x i16> %src512_1, <64 x i16> %src1024_1) { - - ; SSE2: cost of 8 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 3 {{.*}} %V128 = shufflevector - ; SSE42: cost of 3 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 3 {{.*}} %V128 = shufflevector - ; AVX2: cost of 3 {{.*}} %V128 = shufflevector - ; AVX512F: cost of 3 {{.*}} %V128 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V128 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi16' +; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 960 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi16' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 360 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi16' +; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 360 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi16' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 252 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi16' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 420 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi16' +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 196 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi16' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 196 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi16' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi16' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <8 x i16> %src128, <8 x i16> %src128_1, <8 x i32> - - ; SSE2: cost of 48 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 18 {{.*}} %V256 = shufflevector - ; SSE42: cost of 18 {{.*}} %V256 = shufflevector - ; XOP: cost of 9 {{.*}} %V256 = shufflevector - ; AVX1: cost of 15 {{.*}} %V256 = shufflevector - ; AVX2: cost of 7 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 7 {{.*}} %V256 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V256 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <16 x i16> %src256, <16 x i16> %src256_1, <16 x i32> - - ; SSE2: cost of 224 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 84 {{.*}} %V512 = shufflevector - ; SSE42: cost of 84 {{.*}} %V512 = shufflevector - ; XOP: cost of 54 {{.*}} %V512 = shufflevector - ; AVX1: cost of 90 {{.*}} %V512 = shufflevector - ; AVX2: cost of 42 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 42 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 1 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <32 x i16> %src512, <32 x i16> %src512_1, <32 x i32> - - ; SSE2: cost of 960 {{.*}} %V1024 = shufflevector - ; SSSE3: cost of 360 {{.*}} %V1024 = shufflevector - ; SSE42: cost of 360 {{.*}} %V1024 = shufflevector - ; XOP: cost of 252 {{.*}} %V1024 = shufflevector - ; AVX1: cost of 420 {{.*}} %V1024 = shufflevector - ; AVX2: cost of 196 {{.*}} %V1024 = shufflevector - ; AVX512F: cost of 196 {{.*}} %V1024 = shufflevector - ; AVX512BW: cost of 6 {{.*}} %V1024 = shufflevector - ; AVX512VBMI: cost of 6 {{.*}} %V1024 = shufflevector %V1024 = shufflevector <64 x i16> %src1024, <64 x i16> %src1024_1, <64 x i32> - ret void } -; CHECK-LABEL: 'test_vXi8' define void @test_vXi8(<16 x i8> %src128, <32 x i8> %src256, <64 x i8> %src512, <16 x i8> %src128_1, <32 x i8> %src256_1, <64 x i8> %src512_1) { - - ; SSE2: cost of 13 {{.*}} %V128 = shufflevector - ; SSSE3: cost of 3 {{.*}} %V128 = shufflevector - ; SSE42: cost of 3 {{.*}} %V128 = shufflevector - ; XOP: cost of 1 {{.*}} %V128 = shufflevector - ; AVX1: cost of 3 {{.*}} %V128 = shufflevector - ; AVX2: cost of 3 {{.*}} %V128 = shufflevector - ; AVX512F: cost of 3 {{.*}} %V128 = shufflevector - ; AVX512BW: cost of 3 {{.*}} %V128 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V128 = shufflevector +; SSE2-LABEL: 'test_vXi8' +; SSE2-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 78 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 364 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; SSE2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSSE3-LABEL: 'test_vXi8' +; SSSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; SSSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; SSE42-LABEL: 'test_vXi8' +; SSE42-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 84 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; XOP-LABEL: 'test_vXi8' +; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 54 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX1-LABEL: 'test_vXi8' +; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 90 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX2-LABEL: 'test_vXi8' +; AVX2-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512F-LABEL: 'test_vXi8' +; AVX512F-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 42 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512BW-LABEL: 'test_vXi8' +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; +; AVX512VBMI-LABEL: 'test_vXi8' +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> +; AVX512VBMI-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; %V128 = shufflevector <16 x i8> %src128, <16 x i8> %src128_1, <16 x i32> - - ; SSE2: cost of 78 {{.*}} %V256 = shufflevector - ; SSSE3: cost of 18 {{.*}} %V256 = shufflevector - ; SSE42: cost of 18 {{.*}} %V256 = shufflevector - ; XOP: cost of 9 {{.*}} %V256 = shufflevector - ; AVX1: cost of 15 {{.*}} %V256 = shufflevector - ; AVX2: cost of 7 {{.*}} %V256 = shufflevector - ; AVX512F: cost of 7 {{.*}} %V256 = shufflevector - ; AVX512BW: cost of 3 {{.*}} %V256 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V256 = shufflevector %V256 = shufflevector <32 x i8> %src256, <32 x i8> %src256_1, <32 x i32> - - ; SSE2: cost of 364 {{.*}} %V512 = shufflevector - ; SSSE3: cost of 84 {{.*}} %V512 = shufflevector - ; SSE42: cost of 84 {{.*}} %V512 = shufflevector - ; XOP: cost of 54 {{.*}} %V512 = shufflevector - ; AVX1: cost of 90 {{.*}} %V512 = shufflevector - ; AVX2: cost of 42 {{.*}} %V512 = shufflevector - ; AVX512F: cost of 42 {{.*}} %V512 = shufflevector - ; AVX512BW: cost of 19 {{.*}} %V512 = shufflevector - ; AVX512VBMI: cost of 1 {{.*}} %V512 = shufflevector %V512 = shufflevector <64 x i8> %src512, <64 x i8> %src512_1, <64 x i32> - ret void }