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[mips][ias] Implement ulh macro. 

Summary:
This macro is needed to prevent test/CodeGen/Mips/2008-08-01-AsmInline.ll from
failing after the integrated assembler is enabled by default.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D13654

llvm-svn: 250414
This commit is contained in:
Daniel Sanders 2015-10-15 14:52:58 +00:00
parent 6b129bd464
commit 6394ee598e
5 changed files with 230 additions and 9 deletions
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17
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -215,8 +215,8 @@ class MipsAsmParser : public MCTargetAsmParser {
SmallVectorImpl<MCInst> &Instructions, const bool IsMips64,
const bool Signed);
bool expandUlhu(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandUlw(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
@ -1958,6 +1958,7 @@ bool MipsAsmParser::needsExpansion(MCInst &Inst) {
case Mips::UDivMacro:
case Mips::DSDivMacro:
case Mips::DUDivMacro:
case Mips::Ulh:
case Mips::Ulhu:
case Mips::Ulw:
case Mips::NORImm:
@ -2070,8 +2071,10 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
return expandDiv(Inst, IDLoc, Instructions, false, false);
case Mips::DUDivMacro:
return expandDiv(Inst, IDLoc, Instructions, true, false);
case Mips::Ulh:
return expandUlh(Inst, true, IDLoc, Instructions);
case Mips::Ulhu:
return expandUlhu(Inst, IDLoc, Instructions);
return expandUlh(Inst, false, IDLoc, Instructions);
case Mips::Ulw:
return expandUlw(Inst, IDLoc, Instructions);
case Mips::ADDi:
@ -3018,8 +3021,8 @@ bool MipsAsmParser::expandDiv(MCInst &Inst, SMLoc IDLoc,
return false;
}
bool MipsAsmParser::expandUlhu(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
bool MipsAsmParser::expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
if (hasMips32r6() || hasMips64r6()) {
Error(IDLoc, "instruction not supported on mips32r6 or mips64r6");
return false;
@ -3082,8 +3085,8 @@ bool MipsAsmParser::expandUlhu(MCInst &Inst, SMLoc IDLoc,
unsigned SllReg = LoadedOffsetInAT ? DstReg : ATReg;
emitRRI(Mips::LBu, FirstLbuDstReg, LbuSrcReg, FirstLbuOffset, IDLoc,
Instructions);
emitRRI(Signed ? Mips::LB : Mips::LBu, FirstLbuDstReg, LbuSrcReg,
FirstLbuOffset, IDLoc, Instructions);
emitRRI(Mips::LBu, SecondLbuDstReg, LbuSrcReg, SecondLbuOffset, IDLoc,
Instructions);

3
llvm/lib/Target/Mips/MipsInstrInfo.td
View File

@ -1848,6 +1848,9 @@ def DSDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
def DUDivMacro : MipsAsmPseudoInst<(outs), (ins GPR32Opnd:$rs, GPR32Opnd:$rt),
"ddivu\t$rs, $rt">; //, ISA_MIPS64_NOT_64R6;
def Ulh : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulh\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;
def Ulhu : MipsAsmPseudoInst<(outs GPR32Opnd:$rt), (ins mem:$addr),
"ulhu\t$rt, $addr">; //, ISA_MIPS1_NOT_32R6_64R6;

9
llvm/test/MC/Mips/mips-expansions-bad.s
View File

@ -13,14 +13,23 @@
beq $2, 0x100010001, 1332
# 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
.set mips32r6
ulh $5, 0
# 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
ulhu $5, 0
# 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
.set mips32
ulh $5, 1
# 32-BIT-NOT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT-NOT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
ulhu $5, 1
# 32-BIT-NOT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT-NOT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
.set mips64r6
ulh $5, 2
# 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6
ulhu $5, 2
# 32-BIT: :[[@LINE-1]]:3: error: instruction not supported on mips32r6 or mips64r6
# 64-BIT: :[[@LINE-2]]:3: error: instruction not supported on mips32r6 or mips64r6

207
llvm/test/MC/Mips/mips-expansions.s
View File

@ -1,7 +1,7 @@
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-LE
# RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
# RUN: FileCheck %s --check-prefix=CHECK-BE
# RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
# Check that the IAS expands macro instructions in the same way as GAS.
@ -131,7 +131,210 @@
# CHECK-LE: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10]
# CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00]
# Test ULH with immediate operand.
ulh_imm: # CHECK-LABEL: ulh_imm:
ulh $8, 0
# CHECK-BE: lb $1, 0($zero) # encoding: [0x80,0x01,0x00,0x00]
# CHECK-BE: lbu $8, 1($zero) # encoding: [0x90,0x08,0x00,0x01]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, 1($zero) # encoding: [0x01,0x00,0x01,0x80]
# CHECK-LE: lbu $8, 0($zero) # encoding: [0x00,0x00,0x08,0x90]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 2
# CHECK-BE: lb $1, 2($zero) # encoding: [0x80,0x01,0x00,0x02]
# CHECK-BE: lbu $8, 3($zero) # encoding: [0x90,0x08,0x00,0x03]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, 3($zero) # encoding: [0x03,0x00,0x01,0x80]
# CHECK-LE: lbu $8, 2($zero) # encoding: [0x02,0x00,0x08,0x90]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x8000
# CHECK-BE: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, -0x8000
# CHECK-BE: lb $1, -32768($zero) # encoding: [0x80,0x01,0x80,0x00]
# CHECK-BE: lbu $8, -32767($zero) # encoding: [0x90,0x08,0x80,0x01]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, -32767($zero) # encoding: [0x01,0x80,0x01,0x80]
# CHECK-LE: lbu $8, -32768($zero) # encoding: [0x00,0x80,0x08,0x90]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x10000
# CHECK-BE: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x18888
# CHECK-BE: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-BE: ori $1, $1, 34952 # encoding: [0x34,0x21,0x88,0x88]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-LE: ori $1, $1, 34952 # encoding: [0x88,0x88,0x21,0x34]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, -32769
# CHECK-BE: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-BE: ori $1, $1, 32767 # encoding: [0x34,0x21,0x7f,0xff]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-LE: ori $1, $1, 32767 # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 32767
# CHECK-BE: addiu $1, $zero, 32767 # encoding: [0x24,0x01,0x7f,0xff]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: addiu $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x24]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
# Test ULH with immediate offset and a source register operand.
ulh_reg: # CHECK-LABEL: ulh_reg:
ulh $8, 0($9)
# CHECK-BE: lb $1, 0($9) # encoding: [0x81,0x21,0x00,0x00]
# CHECK-BE: lbu $8, 1($9) # encoding: [0x91,0x28,0x00,0x01]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, 1($9) # encoding: [0x01,0x00,0x21,0x81]
# CHECK-LE: lbu $8, 0($9) # encoding: [0x00,0x00,0x28,0x91]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 2($9)
# CHECK-BE: lb $1, 2($9) # encoding: [0x81,0x21,0x00,0x02]
# CHECK-BE: lbu $8, 3($9) # encoding: [0x91,0x28,0x00,0x03]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, 3($9) # encoding: [0x03,0x00,0x21,0x81]
# CHECK-LE: lbu $8, 2($9) # encoding: [0x02,0x00,0x28,0x91]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x8000($9)
# CHECK-BE: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00]
# CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: ori $1, $zero, 32768 # encoding: [0x00,0x80,0x01,0x34]
# CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, -0x8000($9)
# CHECK-BE: lb $1, -32768($9) # encoding: [0x81,0x21,0x80,0x00]
# CHECK-BE: lbu $8, -32767($9) # encoding: [0x91,0x28,0x80,0x01]
# CHECK-BE: sll $1, $1, 8 # encoding: [0x00,0x01,0x0a,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lb $1, -32767($9) # encoding: [0x01,0x80,0x21,0x81]
# CHECK-LE: lbu $8, -32768($9) # encoding: [0x00,0x80,0x28,0x91]
# CHECK-LE: sll $1, $1, 8 # encoding: [0x00,0x0a,0x01,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x10000($9)
# CHECK-BE: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 0x18888($9)
# CHECK-BE: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
# CHECK-BE: ori $1, $1, 34952 # encoding: [0x34,0x21,0x88,0x88]
# CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c]
# CHECK-LE: ori $1, $1, 34952 # encoding: [0x88,0x88,0x21,0x34]
# CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, -32769($9)
# CHECK-BE: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff]
# CHECK-BE: ori $1, $1, 32767 # encoding: [0x34,0x21,0x7f,0xff]
# CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: lui $1, 65535 # encoding: [0xff,0xff,0x01,0x3c]
# CHECK-LE: ori $1, $1, 32767 # encoding: [0xff,0x7f,0x21,0x34]
# CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
ulh $8, 32767($9)
# CHECK-BE: addiu $1, $zero, 32767 # encoding: [0x24,0x01,0x7f,0xff]
# CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21]
# CHECK-BE: lb $8, 0($1) # encoding: [0x80,0x28,0x00,0x00]
# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01]
# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00]
# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25]
# CHECK-LE: addiu $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x24]
# CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00]
# CHECK-LE: lb $8, 1($1) # encoding: [0x01,0x00,0x28,0x80]
# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90]
# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00]
# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01]
# Test ULHU with immediate operand.
ulhu_imm: # CHECK-LABEL: ulhu_imm:
ulhu $8, 0
# CHECK-BE: lbu $1, 0($zero) # encoding: [0x90,0x01,0x00,0x00]
# CHECK-BE: lbu $8, 1($zero) # encoding: [0x90,0x08,0x00,0x01]

3
llvm/test/MC/Mips/set-nomacro.s
View File

@ -60,6 +60,7 @@
bgtu $0, $8, local_label
bgtu $0, $0, local_label
ulh $5, 0
ulhu $5, 0
ulw $8, 2
@ -180,6 +181,8 @@
bgtu $0, $0, local_label
# CHECK-NOT: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
ulh $5, 0
# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions
ulhu $5, 0
# CHECK: [[@LINE-1]]:3: warning: macro instruction expanded into multiple instructions