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[RISCV] Add RISCVProcFamilyEnum and add SiFive7. 

Use it to remove explicit string compares from unrolling preferences.

I'm of two minds on this. Ideally, we would define things in terms
of architectural or microarchitectural features, but it's hard to
do that with things like unrolling preferences without just ending up
with FeatureSiFive7UnrollingPreferences.

Having a proc enum is consistent with ARM and AArch64. X86 only has
a few and is trying to move away from it.

Reviewed By: asb, mcberg2021

Differential Revision: https://reviews.llvm.org/D117060
This commit is contained in:
Craig Topper 2022-01-12 09:13:07 -08:00
parent b2d2e93138
commit 632c263eb3
3 changed files with 31 additions and 9 deletions
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18
llvm/lib/Target/RISCV/RISCV.td
View File

@ -198,6 +198,9 @@ foreach i = {1-31} in
def FeatureSaveRestore : SubtargetFeature<"save-restore", "EnableSaveRestore",
"true", "Enable save/restore.">;
def TuneSiFive7 : SubtargetFeature<"sifive7", "RISCVProcFamily", "SiFive7",
"SiFive 7-Series processors">;
//===----------------------------------------------------------------------===//
// Named operands for CSR instructions.
//===----------------------------------------------------------------------===//
@ -226,8 +229,10 @@ def : ProcessorModel<"generic-rv64", NoSchedModel, [Feature64Bit]>;
def : ProcessorModel<"rocket-rv32", RocketModel, []>;
def : ProcessorModel<"rocket-rv64", RocketModel, [Feature64Bit]>;
def : ProcessorModel<"sifive-7-rv32", SiFive7Model, []>;
def : ProcessorModel<"sifive-7-rv64", SiFive7Model, [Feature64Bit]>;
def : ProcessorModel<"sifive-7-rv32", SiFive7Model, [],
[TuneSiFive7]>;
def : ProcessorModel<"sifive-7-rv64", SiFive7Model, [Feature64Bit],
[TuneSiFive7]>;
def : ProcessorModel<"sifive-e20", RocketModel, [FeatureStdExtM,
FeatureStdExtC]>;
@ -253,7 +258,8 @@ def : ProcessorModel<"sifive-e34", RocketModel, [FeatureStdExtM,
def : ProcessorModel<"sifive-e76", SiFive7Model, [FeatureStdExtM,
FeatureStdExtA,
FeatureStdExtF,
FeatureStdExtC]>;
FeatureStdExtC],
[TuneSiFive7]>;
def : ProcessorModel<"sifive-s21", RocketModel, [Feature64Bit,
FeatureStdExtM,
@ -277,7 +283,8 @@ def : ProcessorModel<"sifive-s76", SiFive7Model, [Feature64Bit,
FeatureStdExtA,
FeatureStdExtF,
FeatureStdExtD,
FeatureStdExtC]>;
FeatureStdExtC],
[TuneSiFive7]>;
def : ProcessorModel<"sifive-u54", RocketModel, [Feature64Bit,
FeatureStdExtM,
@ -291,7 +298,8 @@ def : ProcessorModel<"sifive-u74", SiFive7Model, [Feature64Bit,
FeatureStdExtA,
FeatureStdExtF,
FeatureStdExtD,
FeatureStdExtC]>;
FeatureStdExtC],
[TuneSiFive7]>;
//===----------------------------------------------------------------------===//
// Define the RISC-V target.

17
llvm/lib/Target/RISCV/RISCVSubtarget.h
View File

@ -33,7 +33,17 @@ namespace llvm {
class StringRef;
class RISCVSubtarget : public RISCVGenSubtargetInfo {
public:
enum RISCVProcFamilyEnum : uint8_t {
Others,
SiFive7,
};
private:
virtual void anchor();
RISCVProcFamilyEnum RISCVProcFamily = Others;
bool HasStdExtM = false;
bool HasStdExtA = false;
bool HasStdExtF = false;
@ -100,6 +110,13 @@ public:
return &TSInfo;
}
bool enableMachineScheduler() const override { return true; }
/// Returns RISCV processor family.
/// Avoid this function! CPU specifics should be kept local to this class
/// and preferably modeled with SubtargetFeatures or properties in
/// initializeProperties().
RISCVProcFamilyEnum getProcFamily() const { return RISCVProcFamily; }
bool hasStdExtM() const { return HasStdExtM; }
bool hasStdExtA() const { return HasStdExtA; }
bool hasStdExtF() const { return HasStdExtF; }

5
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
View File

@ -197,10 +197,7 @@ void RISCVTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
// Support explicit targets enabled for SiFive with the unrolling preferences
// below
bool UseDefaultPreferences = true;
if (ST->getTuneCPU().contains("sifive-e76") ||
ST->getTuneCPU().contains("sifive-s76") ||
ST->getTuneCPU().contains("sifive-u74") ||
ST->getTuneCPU().contains("sifive-7"))
if (ST->getProcFamily() == RISCVSubtarget::SiFive7)
UseDefaultPreferences = false;
if (UseDefaultPreferences)