forked from OSchip/llvm-project
If dynamic_stackalloc alignment is > stack alignment, first issue an instruction to align the stack ptr before the decrement.
llvm-svn: 41133
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95667c532c
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@ -15,6 +15,7 @@
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetMachine.h"
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@ -1355,6 +1356,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1));
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return Result.getValue(Op.ResNo);
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case ISD::DYNAMIC_STACKALLOC: {
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MVT::ValueType VT = Node->getValueType(0);
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the size.
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Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the alignment.
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@ -1362,8 +1364,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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Tmp1 = Result.getValue(0);
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Tmp2 = Result.getValue(1);
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switch (TLI.getOperationAction(Node->getOpcode(),
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Node->getValueType(0))) {
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switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Expand: {
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unsigned SPReg = TLI.getStackPointerRegisterToSaveRestore();
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@ -1371,9 +1372,15 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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" not tell us which reg is the stack pointer!");
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SDOperand Chain = Tmp1.getOperand(0);
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SDOperand Size = Tmp2.getOperand(1);
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SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, Node->getValueType(0));
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Tmp1 = DAG.getNode(ISD::SUB, Node->getValueType(0), SP, Size); // Value
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Tmp2 = DAG.getCopyToReg(SP.getValue(1), SPReg, Tmp1); // Output chain
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SDOperand SP = DAG.getCopyFromReg(Chain, SPReg, VT);
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Chain = SP.getValue(1);
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unsigned Align = cast<ConstantSDNode>(Tmp3)->getValue();
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unsigned StackAlign =
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TLI.getTargetMachine().getFrameInfo()->getStackAlignment();
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if (Align > StackAlign)
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SP = DAG.getNode(ISD::AND, VT, SP, DAG.getConstant(-Align, VT));
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Tmp1 = DAG.getNode(ISD::SUB, VT, SP, Size); // Value
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Tmp2 = DAG.getCopyToReg(Chain, SPReg, Tmp1); // Output chain
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Tmp1 = LegalizeOp(Tmp1);
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Tmp2 = LegalizeOp(Tmp2);
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break;
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