forked from OSchip/llvm-project
[NFC][Regalloc] Fix coding style in CalcSpillWeights
This commit is contained in:
Mircea Trofin
parent
e207927950
commit
62e2ac6461
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@ -42,35 +42,35 @@ void VirtRegAuxInfo::calculateSpillWeightsAndHints() {
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}
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// Return the preferred allocation register for reg, given a COPY instruction.
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static Register copyHint(const MachineInstr *mi, unsigned reg,
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const TargetRegisterInfo &tri,
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const MachineRegisterInfo &mri) {
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unsigned sub, hsub;
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Register hreg;
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if (mi->getOperand(0).getReg() == reg) {
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sub = mi->getOperand(0).getSubReg();
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hreg = mi->getOperand(1).getReg();
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hsub = mi->getOperand(1).getSubReg();
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static Register copyHint(const MachineInstr *MI, unsigned Reg,
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const TargetRegisterInfo &TRI,
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const MachineRegisterInfo &MRI) {
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unsigned Sub, HSub;
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Register HReg;
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if (MI->getOperand(0).getReg() == Reg) {
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Sub = MI->getOperand(0).getSubReg();
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HReg = MI->getOperand(1).getReg();
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HSub = MI->getOperand(1).getSubReg();
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} else {
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sub = mi->getOperand(1).getSubReg();
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hreg = mi->getOperand(0).getReg();
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hsub = mi->getOperand(0).getSubReg();
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Sub = MI->getOperand(1).getSubReg();
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HReg = MI->getOperand(0).getReg();
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HSub = MI->getOperand(0).getSubReg();
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}
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if (!hreg)
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if (!HReg)
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return 0;
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if (Register::isVirtualRegister(hreg))
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return sub == hsub ? hreg : Register();
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if (Register::isVirtualRegister(HReg))
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return Sub == HSub ? HReg : Register();
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const TargetRegisterClass *rc = mri.getRegClass(reg);
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Register CopiedPReg = (hsub ? tri.getSubReg(hreg, hsub) : hreg);
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const TargetRegisterClass *rc = MRI.getRegClass(Reg);
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Register CopiedPReg = (HSub ? TRI.getSubReg(HReg, HSub) : HReg);
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if (rc->contains(CopiedPReg))
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return CopiedPReg;
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// Check if reg:sub matches so that a super register could be hinted.
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if (sub)
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return tri.getMatchingSuperReg(CopiedPReg, sub, rc);
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if (Sub)
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return TRI.getMatchingSuperReg(CopiedPReg, Sub, rc);
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return 0;
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}
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@ -129,54 +129,54 @@ static bool isRematerializable(const LiveInterval &LI,
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return true;
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}
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void VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &li) {
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float weight = weightCalcHelper(li);
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void VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &LI) {
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float Weight = weightCalcHelper(LI);
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// Check if unspillable.
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if (weight < 0)
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if (Weight < 0)
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return;
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li.setWeight(weight);
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LI.setWeight(Weight);
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}
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float VirtRegAuxInfo::futureWeight(LiveInterval &li, SlotIndex start,
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SlotIndex end) {
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return weightCalcHelper(li, &start, &end);
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float VirtRegAuxInfo::futureWeight(LiveInterval &LI, SlotIndex Start,
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SlotIndex End) {
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return weightCalcHelper(LI, &Start, &End);
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}
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float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start,
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SlotIndex *end) {
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MachineRegisterInfo &mri = MF.getRegInfo();
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const TargetRegisterInfo &tri = *MF.getSubtarget().getRegisterInfo();
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MachineBasicBlock *mbb = nullptr;
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MachineLoop *loop = nullptr;
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bool isExiting = false;
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float totalWeight = 0;
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unsigned numInstr = 0; // Number of instructions using li
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SmallPtrSet<MachineInstr*, 8> visited;
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float VirtRegAuxInfo::weightCalcHelper(LiveInterval &LI, SlotIndex *Start,
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SlotIndex *End) {
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MachineRegisterInfo &MRI = MF.getRegInfo();
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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MachineBasicBlock *MBB = nullptr;
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MachineLoop *Loop = nullptr;
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bool IsExiting = false;
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float TotalWeight = 0;
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unsigned NumInstr = 0; // Number of instructions using li
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SmallPtrSet<MachineInstr *, 8> Visited;
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std::pair<unsigned, unsigned> TargetHint = mri.getRegAllocationHint(li.reg());
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std::pair<unsigned, unsigned> TargetHint = MRI.getRegAllocationHint(LI.reg());
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if (li.isSpillable() && VRM) {
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Register Reg = li.reg();
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if (LI.isSpillable() && VRM) {
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Register Reg = LI.reg();
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Register Original = VRM->getOriginal(Reg);
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const LiveInterval &OrigInt = LIS.getInterval(Original);
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// li comes from a split of OrigInt. If OrigInt was marked
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// as not spillable, make sure the new interval is marked
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// as not spillable as well.
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if (!OrigInt.isSpillable())
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li.markNotSpillable();
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LI.markNotSpillable();
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}
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// Don't recompute spill weight for an unspillable register.
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bool Spillable = li.isSpillable();
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bool IsSpillable = LI.isSpillable();
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bool localSplitArtifact = start && end;
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bool IsLocalSplitArtifact = Start && End;
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// Do not update future local split artifacts.
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bool updateLI = !localSplitArtifact;
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bool ShouldUpdateLI = !IsLocalSplitArtifact;
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if (localSplitArtifact) {
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MachineBasicBlock *localMBB = LIS.getMBBFromIndex(*end);
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assert(localMBB == LIS.getMBBFromIndex(*start) &&
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if (IsLocalSplitArtifact) {
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MachineBasicBlock *localMBB = LIS.getMBBFromIndex(*End);
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assert(localMBB == LIS.getMBBFromIndex(*Start) &&
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"start and end are expected to be in the same basic block");
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// Local split artifact will have 2 additional copy instructions and they
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@ -184,10 +184,10 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start,
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// localLI = COPY other
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// ...
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// other = COPY localLI
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totalWeight += LiveIntervals::getSpillWeight(true, false, &MBFI, localMBB);
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totalWeight += LiveIntervals::getSpillWeight(false, true, &MBFI, localMBB);
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TotalWeight += LiveIntervals::getSpillWeight(true, false, &MBFI, localMBB);
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TotalWeight += LiveIntervals::getSpillWeight(false, true, &MBFI, localMBB);
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numInstr += 2;
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NumInstr += 2;
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}
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// CopyHint is a sortable hint derived from a COPY instruction.
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@ -209,67 +209,67 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start,
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std::set<CopyHint> CopyHints;
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for (MachineRegisterInfo::reg_instr_nodbg_iterator
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I = mri.reg_instr_nodbg_begin(li.reg()),
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E = mri.reg_instr_nodbg_end();
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I = MRI.reg_instr_nodbg_begin(LI.reg()),
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E = MRI.reg_instr_nodbg_end();
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I != E;) {
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MachineInstr *mi = &*(I++);
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MachineInstr *MI = &*(I++);
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// For local split artifacts, we are interested only in instructions between
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// the expected start and end of the range.
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SlotIndex si = LIS.getInstructionIndex(*mi);
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if (localSplitArtifact && ((si < *start) || (si > *end)))
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SlotIndex SI = LIS.getInstructionIndex(*MI);
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if (IsLocalSplitArtifact && ((SI < *Start) || (SI > *End)))
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continue;
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numInstr++;
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if (mi->isIdentityCopy() || mi->isImplicitDef())
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NumInstr++;
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if (MI->isIdentityCopy() || MI->isImplicitDef())
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continue;
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if (!visited.insert(mi).second)
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if (!Visited.insert(MI).second)
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continue;
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float weight = 1.0f;
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if (Spillable) {
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float Weight = 1.0f;
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if (IsSpillable) {
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// Get loop info for mi.
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if (mi->getParent() != mbb) {
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mbb = mi->getParent();
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loop = Loops.getLoopFor(mbb);
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isExiting = loop ? loop->isLoopExiting(mbb) : false;
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if (MI->getParent() != MBB) {
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MBB = MI->getParent();
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Loop = Loops.getLoopFor(MBB);
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IsExiting = Loop ? Loop->isLoopExiting(MBB) : false;
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}
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// Calculate instr weight.
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bool reads, writes;
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std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg());
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weight = LiveIntervals::getSpillWeight(writes, reads, &MBFI, *mi);
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bool Reads, Writes;
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std::tie(Reads, Writes) = MI->readsWritesVirtualRegister(LI.reg());
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Weight = LiveIntervals::getSpillWeight(Writes, Reads, &MBFI, *MI);
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// Give extra weight to what looks like a loop induction variable update.
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if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
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weight *= 3;
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if (Writes && IsExiting && LIS.isLiveOutOfMBB(LI, MBB))
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Weight *= 3;
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totalWeight += weight;
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TotalWeight += Weight;
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}
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// Get allocation hints from copies.
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if (!mi->isCopy())
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if (!MI->isCopy())
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continue;
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Register hint = copyHint(mi, li.reg(), tri, mri);
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Register hint = copyHint(MI, LI.reg(), TRI, MRI);
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if (!hint)
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continue;
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// Force hweight onto the stack so that x86 doesn't add hidden precision,
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// making the comparison incorrectly pass (i.e., 1 > 1 == true??).
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//
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// FIXME: we probably shouldn't use floats at all.
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volatile float hweight = Hint[hint] += weight;
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if (Register::isVirtualRegister(hint) || mri.isAllocatable(hint))
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volatile float HWeight = Hint[hint] += Weight;
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if (Register::isVirtualRegister(hint) || MRI.isAllocatable(hint))
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CopyHints.insert(
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CopyHint(hint, hweight, Register::isPhysicalRegister(hint)));
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CopyHint(hint, HWeight, Register::isPhysicalRegister(hint)));
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}
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Hint.clear();
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// Pass all the sorted copy hints to mri.
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if (updateLI && CopyHints.size()) {
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if (ShouldUpdateLI && CopyHints.size()) {
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// Remove a generic hint if previously added by target.
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if (TargetHint.first == 0 && TargetHint.second)
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mri.clearSimpleHint(li.reg());
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MRI.clearSimpleHint(LI.reg());
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std::set<unsigned> HintedRegs;
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for (auto &Hint : CopyHints) {
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@ -277,23 +277,23 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start,
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(TargetHint.first != 0 && Hint.Reg == TargetHint.second))
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// Don't add the same reg twice or the target-type hint again.
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continue;
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mri.addRegAllocationHint(li.reg(), Hint.Reg);
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MRI.addRegAllocationHint(LI.reg(), Hint.Reg);
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}
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// Weakly boost the spill weight of hinted registers.
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totalWeight *= 1.01F;
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TotalWeight *= 1.01F;
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}
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// If the live interval was already unspillable, leave it that way.
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if (!Spillable)
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if (!IsSpillable)
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return -1.0;
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// Mark li as unspillable if all live ranges are tiny and the interval
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// is not live at any reg mask. If the interval is live at a reg mask
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// spilling may be required.
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if (updateLI && li.isZeroLength(LIS.getSlotIndexes()) &&
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!li.isLiveAtIndexes(LIS.getRegMaskSlots())) {
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li.markNotSpillable();
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if (ShouldUpdateLI && LI.isZeroLength(LIS.getSlotIndexes()) &&
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!LI.isLiveAtIndexes(LIS.getRegMaskSlots())) {
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LI.markNotSpillable();
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return -1.0;
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}
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@ -301,10 +301,10 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &li, SlotIndex *start,
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// it is a preferred candidate for spilling.
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// FIXME: this gets much more complicated once we support non-trivial
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// re-materialization.
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if (isRematerializable(li, LIS, VRM, *MF.getSubtarget().getInstrInfo()))
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totalWeight *= 0.5F;
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if (isRematerializable(LI, LIS, VRM, *MF.getSubtarget().getInstrInfo()))
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TotalWeight *= 0.5F;
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if (localSplitArtifact)
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return normalize(totalWeight, start->distance(*end), numInstr);
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return normalize(totalWeight, li.getSize(), numInstr);
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if (IsLocalSplitArtifact)
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return normalize(TotalWeight, Start->distance(*End), NumInstr);
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return normalize(TotalWeight, LI.getSize(), NumInstr);
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}
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