forked from OSchip/llvm-project
[AArch64] Clean up callee-save CFI emission. NFC.
Summary: Avoid special case for FP, LR CFI emission and just allow general AArch64FrameLowering::emitCalleeSavedFrameMoves() to handle them. Also, stop recalculating the stack offsets in emitCalleeSavedFrameMoves() since we can just reuse the previously calculated offset stored in the MachineFrameInfo. Depends on D17000 Reviewers: t.p.northover, rengolin, mcrosier, jmolloy Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D17004 llvm-svn: 261885
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@ -202,8 +202,7 @@ void AArch64FrameLowering::eliminateCallFramePseudoInstr(
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}
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void AArch64FrameLowering::emitCalleeSavedFrameMoves(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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unsigned FramePtr) const {
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineModuleInfo &MMI = MF.getMMI();
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@ -216,34 +215,13 @@ void AArch64FrameLowering::emitCalleeSavedFrameMoves(
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if (CSI.empty())
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return;
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const DataLayout &TD = MF.getDataLayout();
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bool HasFP = hasFP(MF);
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// Calculate amount of bytes used for return address storing.
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int stackGrowth = -TD.getPointerSize(0);
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// Calculate offsets.
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int64_t saveAreaOffset = (HasFP ? 2 : 1) * stackGrowth;
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unsigned TotalSkipped = 0;
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for (const auto &Info : CSI) {
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unsigned Reg = Info.getReg();
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int64_t Offset = MFI->getObjectOffset(Info.getFrameIdx()) -
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getOffsetOfLocalArea() + saveAreaOffset;
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// Don't output a new CFI directive if we're re-saving the frame pointer or
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// link register. This happens when the PrologEpilogInserter has inserted an
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// extra "STP" of the frame pointer and link register -- the "emitPrologue"
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// method automatically generates the directives when frame pointers are
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// used. If we generate CFI directives for the extra "STP"s, the linker will
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// lose track of the correct values for the frame pointer and link register.
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if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) {
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TotalSkipped += stackGrowth;
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continue;
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}
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int64_t Offset =
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MFI->getObjectOffset(Info.getFrameIdx()) - getOffsetOfLocalArea();
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unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
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unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
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nullptr, DwarfReg, Offset - TotalSkipped));
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unsigned CFIIndex = MMI.addFrameInst(
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MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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@ -512,21 +490,6 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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// Record the location of the stored LR
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unsigned LR = RegInfo->getDwarfRegNum(AArch64::LR, true);
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CFIIndex = MMI.addFrameInst(
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MCCFIInstruction::createOffset(nullptr, LR, StackGrowth));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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// Record the location of the stored FP
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CFIIndex = MMI.addFrameInst(
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MCCFIInstruction::createOffset(nullptr, Reg, 2 * StackGrowth));
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BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
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.addCFIIndex(CFIIndex)
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.setMIFlags(MachineInstr::FrameSetup);
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} else {
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// Encode the stack size of the leaf function.
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unsigned CFIIndex = MMI.addFrameInst(
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@ -536,8 +499,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
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.setMIFlags(MachineInstr::FrameSetup);
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}
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// Now emit the moves for whatever callee saved regs we have.
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emitCalleeSavedFrameMoves(MBB, MBBI, FramePtr);
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// Now emit the moves for whatever callee saved regs we have (including FP,
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// LR if those are saved).
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emitCalleeSavedFrameMoves(MBB, MBBI);
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}
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}
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@ -25,8 +25,7 @@ public:
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true /*StackRealignable*/) {}
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void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned FramePtr) const;
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MachineBasicBlock::iterator MBBI) const;
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void eliminateCallFramePseudoInstr(MachineFunction &MF,
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MachineBasicBlock &MBB,
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