From 62cdfdab4d717e775a002349f3f65bee3037d426 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Sat, 3 Sep 2022 13:41:33 +0100
Subject: [PATCH] [DAG] canCreateUndefOrPoison - add
 freeze(insert_subvector(x,y,c)) -> insert_subvector(freeze(x),freeze(y),c)
 support

We already have plenty of assertions in place to ensure that the insertion index is constant and inrange
---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 1 +
 llvm/test/CodeGen/X86/freeze-vector.ll         | 4 +---
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 711bd92a51af..cffdc3ace598 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4603,6 +4603,7 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
   case ISD::AssertSext:
   case ISD::AssertZext:
   case ISD::FREEZE:
+  case ISD::INSERT_SUBVECTOR:
   case ISD::AND:
   case ISD::OR:
   case ISD::XOR:
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 0275d25cebcd..af34e5667fa9 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -5,9 +5,7 @@
 define <4 x i32> @freeze_insert_subvector(<8 x i32> %a0) nounwind {
 ; CHECK-LABEL: freeze_insert_subvector:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vmovaps %xmm0, %xmm0
-; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm0
-; CHECK-NEXT:    vzeroupper
+; CHECK-NEXT:    vxorps %xmm0, %xmm0, %xmm0
 ; CHECK-NEXT:    ret{{[l|q]}}
   %x = shufflevector <8 x i32> %a0, <8 x i32> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
   %y = freeze <8 x i32> %x