diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 5af9c7368cf6..c9642caef73d 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -28,7 +28,6 @@
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/TargetLowering.h"
 #include "llvm/Support/Debug.h"
-#include <iostream>
 using namespace llvm;
 
 //===--------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
index ac2ed8ebab56..7fe2332fbfd2 100644
--- a/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -31,7 +31,6 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <algorithm>
-#include <iostream>
 using namespace llvm;
 
 unsigned ARMRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
@@ -70,7 +69,7 @@ unsigned ARMRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
   case S30: return 30;
   case S31: return 31;
   default:
-    std::cerr << "Unknown ARM register!\n";
+    assert(0 && "Unknown ARM register!");
     abort();
   }
 }
@@ -738,7 +737,7 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const{
       break;
     }
     default:
-      std::cerr << "Unsupported addressing mode!\n";
+      assert(0 && "Unsupported addressing mode!");
       abort();
       break;
     }