maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Remove unused private fields found by clang's new -Wunused-private-field. 

There are some that I didn't remove this round because they looked like
obvious stubs. There are dead variables in gtest too, they should be
fixed upstream.

llvm-svn: 158090
This commit is contained in:
Benjamin Kramer 2012-06-06 18:25:08 +00:00
parent a98032e4cf
commit 628a39faa3
24 changed files with 21 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
View File

@ -36,7 +36,6 @@ namespace llvm {
/// scheduled as soon as possible after the variable's last use.
///
class LoopDependencies {
const MachineLoopInfo &MLI;
const MachineDominatorTree &MDT;
public:
@ -44,9 +43,7 @@ namespace llvm {
LoopDeps;
LoopDeps Deps;
LoopDependencies(const MachineLoopInfo &mli,
const MachineDominatorTree &mdt) :
MLI(mli), MDT(mdt) {}
LoopDependencies(const MachineDominatorTree &mdt) : MDT(mdt) {}
/// VisitLoop - Clear out any previous state and analyze the given loop.
///

1
llvm/lib/CodeGen/PostRASchedulerList.cpp
View File

@ -78,7 +78,6 @@ AntiDepBreaker::~AntiDepBreaker() { }
namespace {
class PostRAScheduler : public MachineFunctionPass {
AliasAnalysis *AA;
const TargetInstrInfo *TII;
RegisterClassInfo RegClassInfo;

1
llvm/lib/CodeGen/RegAllocBasic.cpp
View File

@ -65,7 +65,6 @@ class RABasic : public MachineFunctionPass, public RegAllocBase
MachineFunction *MF;
// analyses
LiveStacks *LS;
RenderMachineFunction *RMF;
// state

2
llvm/lib/CodeGen/RegAllocPBQP.cpp
View File

@ -375,7 +375,7 @@ std::auto_ptr<PBQPRAProblem> PBQPBuilderWithCoalescing::build(
PBQP::Graph &g = p->getGraph();
const TargetMachine &tm = mf->getTarget();
CoalescerPair cp(*tm.getInstrInfo(), *tm.getRegisterInfo());
CoalescerPair cp(*tm.getRegisterInfo());
// Scan the machine function and add a coalescing cost whenever CoalescerPair
// gives the Ok.

2
llvm/lib/CodeGen/RegisterCoalescer.cpp
View File

@ -939,7 +939,7 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
Again = false;
DEBUG(dbgs() << LIS->getInstructionIndex(CopyMI) << '\t' << *CopyMI);
CoalescerPair CP(*TII, *TRI);
CoalescerPair CP(*TRI);
if (!CP.setRegisters(CopyMI)) {
DEBUG(dbgs() << "\tNot coalescable.\n");
return false;

5
llvm/lib/CodeGen/RegisterCoalescer.h
View File

@ -26,7 +26,6 @@ namespace llvm {
/// two registers can be coalesced, CoalescerPair can determine if a copy
/// instruction would become an identity copy after coalescing.
class CoalescerPair {
const TargetInstrInfo &TII;
const TargetRegisterInfo &TRI;
/// DstReg - The register that will be left after coalescing. It can be a
@ -60,8 +59,8 @@ namespace llvm {
const TargetRegisterClass *NewRC;
public:
CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
: TII(tii), TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
CoalescerPair(const TargetRegisterInfo &tri)
: TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
Partial(false), CrossClass(false), Flipped(false), NewRC(0) {}
/// setRegisters - set registers to match the copy instruction MI. Return

2
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
View File

@ -47,7 +47,7 @@ ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
: ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
InstrItins(mf.getTarget().getInstrItineraryData()), LIS(lis),
IsPostRA(IsPostRAFlag), UnitLatencies(false), CanHandleTerminators(false),
LoopRegs(MLI, MDT), FirstDbgValue(0) {
LoopRegs(MDT), FirstDbgValue(0) {
assert((IsPostRA || LIS) && "PreRA scheduling requires LiveIntervals");
DbgValues.clear();
assert(!(IsPostRA && MRI.getNumVirtRegs()) &&

2
llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
View File

@ -24,8 +24,6 @@ STATISTIC(NumMovedInsts, "Number of predicated instructions moved");
namespace {
class Thumb2ITBlockPass : public MachineFunctionPass {
bool PreRegAlloc;
public:
static char ID;
Thumb2ITBlockPass() : MachineFunctionPass(ID) {}

2
llvm/lib/Target/MBlaze/MBlazeAsmPrinter.cpp
View File

@ -187,7 +187,7 @@ void MBlazeAsmPrinter::EmitFunctionBodyEnd() {
//===----------------------------------------------------------------------===//
void MBlazeAsmPrinter::EmitInstruction(const MachineInstr *MI) {
MBlazeMCInstLower MCInstLowering(OutContext, *Mang, *this);
MBlazeMCInstLower MCInstLowering(OutContext, *this);
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);

6
llvm/lib/Target/MBlaze/MBlazeMCInstLower.h
View File

@ -21,18 +21,16 @@ namespace llvm {
class MachineInstr;
class MachineModuleInfoMachO;
class MachineOperand;
class Mangler;
/// MBlazeMCInstLower - This class is used to lower an MachineInstr
/// into an MCInst.
class LLVM_LIBRARY_VISIBILITY MBlazeMCInstLower {
MCContext &Ctx;
Mangler &Mang;
AsmPrinter &Printer;
public:
MBlazeMCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
: Ctx(ctx), Mang(mang), Printer(printer) {}
MBlazeMCInstLower(MCContext &ctx, AsmPrinter &printer)
: Ctx(ctx), Printer(printer) {}
void Lower(const MachineInstr *MI, MCInst &OutMI) const;
MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;

2
llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
View File

@ -154,7 +154,7 @@ bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
//===----------------------------------------------------------------------===//
void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
MSP430MCInstLower MCInstLowering(OutContext, *Mang, *this);
MSP430MCInstLower MCInstLowering(OutContext, *this);
MCInst TmpInst;
MCInstLowering.Lower(MI, TmpInst);

2
llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
View File

@ -59,7 +59,7 @@ HWMultMode("msp430-hwmult-mode",
MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
TargetLowering(tm, new TargetLoweringObjectFileELF()),
Subtarget(*tm.getSubtargetImpl()), TM(tm) {
Subtarget(*tm.getSubtargetImpl()) {
TD = getTargetData();

1
llvm/lib/Target/MSP430/MSP430ISelLowering.h
View File

@ -169,7 +169,6 @@ namespace llvm {
SelectionDAG &DAG) const;
const MSP430Subtarget &Subtarget;
const MSP430TargetMachine &TM;
const TargetData *TD;
};
} // namespace llvm

2
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
View File

@ -29,7 +29,7 @@ using namespace llvm;
MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
: MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
RI(tm, *this), TM(tm) {}
RI(tm, *this) {}
void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,

1
llvm/lib/Target/MSP430/MSP430InstrInfo.h
View File

@ -42,7 +42,6 @@ namespace MSP430II {
class MSP430InstrInfo : public MSP430GenInstrInfo {
const MSP430RegisterInfo RI;
MSP430TargetMachine &TM;
public:
explicit MSP430InstrInfo(MSP430TargetMachine &TM);

6
llvm/lib/Target/MSP430/MSP430MCInstLower.h
View File

@ -21,18 +21,16 @@ namespace llvm {
class MachineInstr;
class MachineModuleInfoMachO;
class MachineOperand;
class Mangler;
/// MSP430MCInstLower - This class is used to lower an MachineInstr
/// into an MCInst.
class LLVM_LIBRARY_VISIBILITY MSP430MCInstLower {
MCContext &Ctx;
Mangler &Mang;
AsmPrinter &Printer;
public:
MSP430MCInstLower(MCContext &ctx, Mangler &mang, AsmPrinter &printer)
: Ctx(ctx), Mang(mang), Printer(printer) {}
MSP430MCInstLower(MCContext &ctx, AsmPrinter &printer)
: Ctx(ctx), Printer(printer) {}
void Lower(const MachineInstr *MI, MCInst &OutMI) const;
MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;

3
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -4057,9 +4057,6 @@ namespace {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
private:
unsigned BaseReg;
};
}

2
llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
View File

@ -16,7 +16,6 @@
#define DEBUG_TYPE "indvars"
#include "llvm/Instructions.h"
#include "llvm/Analysis/Dominators.h"
#include "llvm/Analysis/IVUsers.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/LoopPass.h"
@ -44,7 +43,6 @@ namespace {
class SimplifyIndvar {
Loop *L;
LoopInfo *LI;
DominatorTree *DT;
ScalarEvolution *SE;
const TargetData *TD; // May be NULL

6
llvm/tools/llvm-diff/DiffConsumer.h
View File

@ -67,8 +67,6 @@ namespace llvm {
};
raw_ostream &out;
Module *LModule;
Module *RModule;
SmallVector<DiffContext, 5> contexts;
bool Differences;
unsigned Indent;
@ -78,8 +76,8 @@ namespace llvm {
void indent();
public:
DiffConsumer(Module *L, Module *R)
: out(errs()), LModule(L), RModule(R), Differences(false), Indent(0) {}
DiffConsumer()
: out(errs()), Differences(false), Indent(0) {}
bool hadDifferences() const;
void enterContext(Value *L, Value *R);

5
llvm/tools/llvm-diff/DifferenceEngine.h
View File

@ -59,8 +59,8 @@ namespace llvm {
virtual ~Oracle() {}
};
DifferenceEngine(LLVMContext &context, Consumer &consumer)
: context(context), consumer(consumer), globalValueOracle(0) {}
DifferenceEngine(Consumer &consumer)
: consumer(consumer), globalValueOracle(0) {}
void diff(Module *L, Module *R);
void diff(Function *L, Function *R);
@ -84,7 +84,6 @@ namespace llvm {
bool equivalentAsOperands(GlobalValue *L, GlobalValue *R);
private:
LLVMContext &context;
Consumer &consumer;
Oracle *globalValueOracle;
};

4
llvm/tools/llvm-diff/llvm-diff.cpp
View File

@ -78,8 +78,8 @@ int main(int argc, char **argv) {
Module *RModule = ReadModule(Context, RightFilename);
if (!LModule || !RModule) return 1;
DiffConsumer Consumer(LModule, RModule);
DifferenceEngine Engine(Context, Consumer);
DiffConsumer Consumer;
DifferenceEngine Engine(Consumer);
// If any global names were given, just diff those.
if (!GlobalsToCompare.empty()) {

1
llvm/tools/lto/LTOCodeGenerator.h
View File

@ -70,7 +70,6 @@ private:
llvm::TargetMachine* _target;
bool _emitDwarfDebugInfo;
bool _scopeRestrictionsDone;
bool _runInternalizePass;
lto_codegen_model _codeModel;
StringSet _mustPreserveSymbols;
StringSet _asmUndefinedRefs;

2
llvm/utils/TableGen/FastISelEmitter.cpp
View File

@ -867,6 +867,6 @@ void FastISelEmitter::run(raw_ostream &OS) {
}
FastISelEmitter::FastISelEmitter(RecordKeeper &R)
: Records(R), CGP(R) {
: CGP(R) {
}

1
llvm/utils/TableGen/FastISelEmitter.h
View File

@ -25,7 +25,6 @@ class CodeGenTarget;
/// and emission of the instruction selector.
///
class FastISelEmitter : public TableGenBackend {
RecordKeeper &Records;
CodeGenDAGPatterns CGP;
public:
explicit FastISelEmitter(RecordKeeper &R);