forked from OSchip/llvm-project
Make sure x86 instructions using ssmem/sdmem operand types are only able to parse memory operands of the proper size in Intel syntax. Primarily affects some of sse cvt instructions.
llvm-svn: 189206
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@ -251,13 +251,13 @@ def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
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def ssmem : Operand<v4f32> {
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let PrintMethod = "printf32mem";
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let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
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let ParserMatchClass = X86MemAsmOperand;
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let ParserMatchClass = X86Mem32AsmOperand;
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let OperandType = "OPERAND_MEMORY";
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}
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def sdmem : Operand<v2f64> {
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let PrintMethod = "printf64mem";
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let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
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let ParserMatchClass = X86MemAsmOperand;
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let ParserMatchClass = X86Mem64AsmOperand;
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let OperandType = "OPERAND_MEMORY";
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}
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