forked from OSchip/llvm-project
[x86] add 'nounwind' to tests to reduce noise; NFC
llvm-svn: 356761
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@ -8,7 +8,7 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; One way to do that is with (select (fcmp une/oeq)), which gets
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; legalized to setp/setne.
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define i32 @test_select_fcmp_oeq_i32(float %a, float %b, i32 %c, i32 %d) #0 {
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define i32 @test_select_fcmp_oeq_i32(float %a, float %b, i32 %c, i32 %d) nounwind {
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; CMOV-LABEL: test_select_fcmp_oeq_i32:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: movl %edi, %eax
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@ -40,7 +40,7 @@ entry:
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ret i32 %r
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}
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define i64 @test_select_fcmp_oeq_i64(float %a, float %b, i64 %c, i64 %d) #0 {
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define i64 @test_select_fcmp_oeq_i64(float %a, float %b, i64 %c, i64 %d) nounwind {
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; CMOV-LABEL: test_select_fcmp_oeq_i64:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: movq %rdi, %rax
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@ -73,7 +73,7 @@ entry:
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ret i64 %r
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}
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define i64 @test_select_fcmp_une_i64(float %a, float %b, i64 %c, i64 %d) #0 {
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define i64 @test_select_fcmp_une_i64(float %a, float %b, i64 %c, i64 %d) nounwind {
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; CMOV-LABEL: test_select_fcmp_une_i64:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: movq %rsi, %rax
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@ -106,7 +106,7 @@ entry:
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ret i64 %r
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}
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define double @test_select_fcmp_oeq_f64(float %a, float %b, double %c, double %d) #0 {
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define double @test_select_fcmp_oeq_f64(float %a, float %b, double %c, double %d) nounwind {
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; CMOV-LABEL: test_select_fcmp_oeq_f64:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: ucomiss %xmm1, %xmm0
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@ -142,7 +142,7 @@ entry:
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ret double %r
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}
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define <4 x i32> @test_select_fcmp_oeq_v4i32(float %a, float %b, <4 x i32> %c, <4 x i32> %d) #0 {
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define <4 x i32> @test_select_fcmp_oeq_v4i32(float %a, float %b, <4 x i32> %c, <4 x i32> %d) nounwind {
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; CMOV-LABEL: test_select_fcmp_oeq_v4i32:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: ucomiss %xmm1, %xmm0
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@ -213,7 +213,7 @@ entry:
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; Also make sure we catch the original code-sequence of interest:
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define float @test_zext_fcmp_une(float %a, float %b) #0 {
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define float @test_zext_fcmp_une(float %a, float %b) nounwind {
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; CMOV-LABEL: test_zext_fcmp_une:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: ucomiss %xmm1, %xmm0
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@ -256,7 +256,7 @@ entry:
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ret float %conv2
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}
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define float @test_zext_fcmp_oeq(float %a, float %b) #0 {
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define float @test_zext_fcmp_oeq(float %a, float %b) nounwind {
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; CMOV-LABEL: test_zext_fcmp_oeq:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: ucomiss %xmm1, %xmm0
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@ -321,7 +321,7 @@ attributes #0 = { nounwind }
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; %13 = COPY %12
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; Which was invalid as %12 is not the same value as %13
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define void @no_cascade_opt(i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
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define void @no_cascade_opt(i32 %v0, i32 %v1, i32 %v2, i32 %v3) nounwind {
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; CMOV-LABEL: no_cascade_opt:
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; CMOV: # %bb.0: # %entry
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; CMOV-NEXT: cmpl %edx, %esi
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