forked from OSchip/llvm-project
[mlir][sparse] support new kind of scalar in sparse linalg generic op
We have several ways of introducing a scalar invariant value into linalg generic ops (should we limit this somewhat?). This revision makes sure we handle all of them correctly in the sparse compiler. Reviewed By: gysit Differential Revision: https://reviews.llvm.org/D104335
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@ -458,11 +458,17 @@ static Optional<unsigned> buildTensorExp(Merger &merger, linalg::GenericOp op,
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Value val) {
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if (auto arg = val.dyn_cast<BlockArgument>()) {
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unsigned argN = arg.getArgNumber();
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// Any parameter of the generic op is considered a tensor,
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// indexed by the implicit loop bounds.
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if (arg.getOwner()->getParentOp() == op)
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return merger.addExp(Kind::kTensor, argN);
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// Any parameter of a higher op is invariant.
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// Any argument of the generic op that is not marked as a scalar
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// argument is considered a tensor, indexed by the implicit loop
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// bounds. This includes rank-0 tensor arguments.
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if (arg.getOwner()->getParentOp() == op) {
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OpOperand *t = op.getInputAndOutputOperands()[argN];
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if (!op.isScalar(t))
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return merger.addExp(Kind::kTensor, argN);
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val = t->get(); // get scalar value
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}
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// Any other argument (marked as scalar argument for the generic op
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// or belonging to an enveloping op) is considered invariant.
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return merger.addExp(Kind::kInvariant, val);
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}
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Operation *def = val.getDefiningOp();
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@ -719,9 +725,7 @@ static Value genTensorLoad(Merger &merger, CodeGen &codegen,
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}
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// Actual load.
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SmallVector<Value, 4> args;
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OpOperand *t = merger.exp(exp).e0 < op.getNumInputs()
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? op.getInputOperand(merger.exp(exp).e0)
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: op.getOutputOperand(0);
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OpOperand *t = op.getInputAndOutputOperands()[merger.exp(exp).e0];
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unsigned tensor = t->getOperandNumber();
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auto map = op.getTiedIndexingMap(t);
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auto enc = getSparseTensorEncoding(t->get().getType());
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@ -919,11 +923,9 @@ static void genInvariants(Merger &merger, CodeGen &codegen,
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if (merger.exp(exp).kind == Kind::kTensor) {
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// Inspect tensor indices.
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bool atLevel = ldx == -1u;
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OpOperand *tensor = merger.exp(exp).e0 < op.getNumInputs()
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? op.getInputOperand(merger.exp(exp).e0)
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: op.getOutputOperand(0);
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auto map = op.getTiedIndexingMap(tensor);
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auto enc = getSparseTensorEncoding(tensor->get().getType());
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OpOperand *t = op.getInputAndOutputOperands()[merger.exp(exp).e0];
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auto map = op.getTiedIndexingMap(t);
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auto enc = getSparseTensorEncoding(t->get().getType());
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for (unsigned d = 0, rank = map.getNumResults(); d < rank; d++) {
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unsigned idx = map.getDimPosition(perm(enc, d));
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if (!codegen.loops[idx])
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@ -933,7 +935,7 @@ static void genInvariants(Merger &merger, CodeGen &codegen,
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}
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// All exhausted at this level (atLevel denotes exactly at this level).
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OpOperand *lhs = op.getOutputOperand(0);
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if (lhs == tensor) {
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if (lhs == t) {
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codegen.redExp = hoist ? exp : -1u;
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} else if (atLevel) {
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merger.exp(exp).val =
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@ -1413,8 +1415,6 @@ public:
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// Detects sparse annotations and translate the per-dimension sparsity
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// information for all tensors to loop indices in the kernel.
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assert(op.getNumOutputs() == 1);
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assert(llvm::none_of(op.getInputAndOutputOperands(),
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[&](OpOperand *t) { return op.isScalar(t); }));
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unsigned numTensors = op.getNumInputsAndOutputs();
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unsigned numLoops = op.iterator_types().getValue().size();
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Merger merger(numTensors, numLoops);
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@ -0,0 +1,83 @@
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// NOTE: Assertions have been autogenerated by utils/generate-test-checks.py
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// RUN: mlir-opt %s -sparsification | FileCheck %s
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#SparseMatrix = #sparse_tensor.encoding<{ dimLevelType = [ "compressed", "compressed" ] }>
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// A contrived example that demonstrates the many different ways
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// in which scalar values can be involved in a sparse kernel
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// through the linalg generic op.
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#trait = {
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indexing_maps = [
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affine_map<(i,j) -> (i,j)>, // A (sparse tensor)
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affine_map<(i,j) -> ()>, // p (scalar tensor)
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affine_map<(i,j) -> ()>, // q (true scalar)
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affine_map<(i,j) -> (i,j)> // X (dense tensor out)
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],
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iterator_types = ["parallel", "parallel"],
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doc = "X(i,j) += A(i,j) * p * q * r * s * 2.2"
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}
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// CHECK-LABEL: func @mul(
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// CHECK-SAME: %[[VAL_0:.*0]]: tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>>,
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// CHECK-SAME: %[[VAL_1:.*1]]: tensor<f32>,
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// CHECK-SAME: %[[VAL_2:.*2]]: f32,
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// CHECK-SAME: %[[VAL_3:.*3]]: f32,
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// CHECK-SAME: %[[VAL_4:.*4]]: tensor<32x16xf32> {linalg.inplaceable = true}) -> tensor<32x16xf32> {
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// CHECK: %[[VAL_5:.*]] = constant 2.200000e+00 : f32
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// CHECK: %[[VAL_6:.*]] = constant 0 : index
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// CHECK: %[[VAL_7:.*]] = constant 1 : index
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// CHECK: %[[VAL_8:.*]] = addf %[[VAL_2]], %[[VAL_3]] : f32
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// CHECK: %[[VAL_9:.*]] = sparse_tensor.pointers %[[VAL_0]], %[[VAL_6]] : tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>> to memref<?xindex>
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// CHECK: %[[VAL_10:.*]] = sparse_tensor.indices %[[VAL_0]], %[[VAL_6]] : tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>> to memref<?xindex>
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// CHECK: %[[VAL_11:.*]] = sparse_tensor.pointers %[[VAL_0]], %[[VAL_7]] : tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>> to memref<?xindex>
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// CHECK: %[[VAL_12:.*]] = sparse_tensor.indices %[[VAL_0]], %[[VAL_7]] : tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>> to memref<?xindex>
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// CHECK: %[[VAL_13:.*]] = sparse_tensor.values %[[VAL_0]] : tensor<32x16xf32, #sparse_tensor.encoding<{{.*}}>> to memref<?xf32>
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// CHECK: %[[VAL_14:.*]] = memref.buffer_cast %[[VAL_1]] : memref<f32>
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// CHECK: %[[VAL_15:.*]] = memref.buffer_cast %[[VAL_4]] : memref<32x16xf32>
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// CHECK: %[[VAL_16:.*]] = memref.load %[[VAL_14]][] : memref<f32>
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// CHECK: %[[VAL_17:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_6]]] : memref<?xindex>
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// CHECK: %[[VAL_18:.*]] = memref.load %[[VAL_9]]{{\[}}%[[VAL_7]]] : memref<?xindex>
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// CHECK: scf.for %[[VAL_19:.*]] = %[[VAL_17]] to %[[VAL_18]] step %[[VAL_7]] {
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// CHECK: %[[VAL_20:.*]] = memref.load %[[VAL_10]]{{\[}}%[[VAL_19]]] : memref<?xindex>
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// CHECK: %[[VAL_21:.*]] = memref.load %[[VAL_11]]{{\[}}%[[VAL_19]]] : memref<?xindex>
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// CHECK: %[[VAL_22:.*]] = addi %[[VAL_19]], %[[VAL_7]] : index
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// CHECK: %[[VAL_23:.*]] = memref.load %[[VAL_11]]{{\[}}%[[VAL_22]]] : memref<?xindex>
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// CHECK: scf.for %[[VAL_24:.*]] = %[[VAL_21]] to %[[VAL_23]] step %[[VAL_7]] {
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// CHECK: %[[VAL_25:.*]] = memref.load %[[VAL_12]]{{\[}}%[[VAL_24]]] : memref<?xindex>
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// CHECK: %[[VAL_26:.*]] = memref.load %[[VAL_13]]{{\[}}%[[VAL_24]]] : memref<?xf32>
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// CHECK: %[[VAL_27:.*]] = mulf %[[VAL_26]], %[[VAL_16]] : f32
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// CHECK: %[[VAL_28:.*]] = mulf %[[VAL_27]], %[[VAL_2]] : f32
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// CHECK: %[[VAL_29:.*]] = mulf %[[VAL_28]], %[[VAL_3]] : f32
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// CHECK: %[[VAL_30:.*]] = mulf %[[VAL_29]], %[[VAL_8]] : f32
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// CHECK: %[[VAL_31:.*]] = mulf %[[VAL_30]], %[[VAL_5]] : f32
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// CHECK: %[[VAL_32:.*]] = memref.load %[[VAL_15]]{{\[}}%[[VAL_20]], %[[VAL_25]]] : memref<32x16xf32>
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// CHECK: %[[VAL_33:.*]] = addf %[[VAL_31]], %[[VAL_32]] : f32
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// CHECK: memref.store %[[VAL_33]], %[[VAL_15]]{{\[}}%[[VAL_20]], %[[VAL_25]]] : memref<32x16xf32>
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// CHECK: }
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// CHECK: }
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// CHECK: %[[VAL_34:.*]] = memref.tensor_load %[[VAL_15]] : memref<32x16xf32>
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// CHECK: return %[[VAL_34]] : tensor<32x16xf32>
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// CHECK: }
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func @mul(%arga: tensor<32x16xf32, #SparseMatrix>,
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%argp: tensor<f32>,
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%argq: f32,
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%argr: f32,
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%argx: tensor<32x16xf32> {linalg.inplaceable = true}) -> tensor<32x16xf32> {
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%s = addf %argq, %argr : f32
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%c = constant 2.2 : f32
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%0 = linalg.generic #trait
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ins(%arga, %argp, %argq: tensor<32x16xf32, #SparseMatrix>, tensor<f32>, f32)
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outs(%argx: tensor<32x16xf32>) {
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^bb(%a: f32, %p: f32, %q: f32, %x: f32):
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%0 = mulf %a, %p : f32 // scalar tensor argument
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%1 = mulf %0, %q : f32 // scalar argument
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%2 = mulf %1, %argr : f32 // scalar argument from outside block
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%3 = mulf %2, %s : f32 // scalar value from outside block
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%4 = mulf %3, %c : f32 // direct constant from outside block
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%5 = addf %4, %x : f32
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linalg.yield %5 : f32
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} -> tensor<32x16xf32>
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return %0 : tensor<32x16xf32>
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}
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