From 614f36fd38ec1f0a9f8d12470adec60bf9345c52 Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Mon, 28 Feb 2022 11:20:02 -0500 Subject: [PATCH] [InstCombine] add tests for select of zero or all ones; NFC See #54053 --- llvm/test/Transforms/InstCombine/select.ll | 108 +++++++++++++++++++++ 1 file changed, 108 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll index 8b33850e4758..48403bb46137 100644 --- a/llvm/test/Transforms/InstCombine/select.ll +++ b/llvm/test/Transforms/InstCombine/select.ll @@ -3004,6 +3004,114 @@ define <2 x i32> @mul_select_eq_undef_vector_not_merging_to_zero(<2 x i32> %x, < ret <2 x i32> %r } +define i8 @ne0_is_all_ones(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + %ugt1 = icmp ugt i8 %x, 1 + %r = select i1 %ugt1, i8 -1, i8 %negx + ret i8 %r +} + +define i8 @ne0_is_all_ones_use1(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones_use1( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: call void @use_i8(i8 [[NEGX]]) +; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 1 +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + call void @use_i8(i8 %negx) + %ugt1 = icmp ugt i8 %x, 1 + %r = select i1 %ugt1, i8 -1, i8 %negx + ret i8 %r +} + +define i8 @ne0_is_all_ones_use2(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones_use2( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 1 +; CHECK-NEXT: call void @use(i1 [[UGT1]]) +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + %ugt1 = icmp ugt i8 %x, 1 + call void @use(i1 %ugt1) + %r = select i1 %ugt1, i8 -1, i8 %negx + ret i8 %r +} + +define i8 @ne0_is_all_ones_wrong_pred(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones_wrong_pred( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[UGT1:%.*]] = icmp sgt i8 [[X]], 2 +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + %ugt1 = icmp sgt i8 %x, 2 + %r = select i1 %ugt1, i8 -1, i8 %negx + ret i8 %r +} + +define i8 @ne0_is_all_ones_wrong_cmp(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones_wrong_cmp( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 2 +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 -1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + %ugt1 = icmp ugt i8 %x, 2 + %r = select i1 %ugt1, i8 -1, i8 %negx + ret i8 %r +} + +define i8 @ne0_is_all_ones_wrong_sel(i8 %x) { +; CHECK-LABEL: @ne0_is_all_ones_wrong_sel( +; CHECK-NEXT: [[NEGX:%.*]] = sub i8 0, [[X:%.*]] +; CHECK-NEXT: [[UGT1:%.*]] = icmp ugt i8 [[X]], 2 +; CHECK-NEXT: [[R:%.*]] = select i1 [[UGT1]], i8 1, i8 [[NEGX]] +; CHECK-NEXT: ret i8 [[R]] +; + %negx = sub i8 0, %x + %ugt1 = icmp ugt i8 %x, 2 + %r = select i1 %ugt1, i8 1, i8 %negx + ret i8 %r +} + +define <2 x i8> @ne0_is_all_ones_swap_vec(<2 x i8> %x) { +; CHECK-LABEL: @ne0_is_all_ones_swap_vec( +; CHECK-NEXT: [[NEGX:%.*]] = sub <2 x i8> zeroinitializer, [[X:%.*]] +; CHECK-NEXT: [[ULT2:%.*]] = icmp ult <2 x i8> [[X]], +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[ULT2]], <2 x i8> [[NEGX]], <2 x i8> +; CHECK-NEXT: ret <2 x i8> [[R]] +; + %negx = sub <2 x i8> zeroinitializer, %x + %ult2 = icmp ult <2 x i8> %x, + %r = select <2 x i1> %ult2, <2 x i8> %negx, <2 x i8> + ret <2 x i8> %r +} + +define <2 x i8> @ne0_is_all_ones_swap_vec_poison(<2 x i8> %x) { +; CHECK-LABEL: @ne0_is_all_ones_swap_vec_poison( +; CHECK-NEXT: [[NEGX:%.*]] = sub <2 x i8> , [[X:%.*]] +; CHECK-NEXT: [[ULT2:%.*]] = icmp ult <2 x i8> [[X]], +; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[ULT2]], <2 x i8> [[NEGX]], <2 x i8> +; CHECK-NEXT: ret <2 x i8> [[R]] +; + %negx = sub <2 x i8> , %x + %ult2 = icmp ult <2 x i8> %x, + %r = select <2 x i1> %ult2, <2 x i8> %negx, <2 x i8> + ret <2 x i8> %r +} + declare void @use(i1) declare void @use_i8(i8) declare void @use_i32(i32)