forked from OSchip/llvm-project
[RISCV] Update error message to not call 'RV32' and 'RV64' an extension.
I used RV32 so I didn't have to write RV32I and RV32E. Ideally these builtins will be wrapped in a header someday so long term I don't expect users to see these errors. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D133444
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@ -11636,7 +11636,7 @@ def warn_tcb_enforcement_violation : Warning<
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// RISC-V builtin required extension warning
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def err_riscv_builtin_requires_extension : Error<
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"builtin requires at least one of the following extensions to be enabled: %0">;
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"builtin requires%select{| at least one of the following extensions to be enabled}0: %1">;
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def err_riscv_builtin_invalid_lmul : Error<
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"LMUL argument must be in the range [0,3] or [5,7]">;
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@ -4369,13 +4369,20 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
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if (llvm::none_of(ReqOpFeatures,
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[&TI](StringRef OF) { return TI.hasFeature(OF); })) {
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std::string FeatureStrs;
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bool IsExtension = true;
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for (StringRef OF : ReqOpFeatures) {
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// If the feature is 64bit, alter the string so it will print better in
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// the diagnostic.
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if (OF == "64bit")
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if (OF == "64bit") {
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assert(ReqOpFeatures.size() == 1 && "Expected '64bit' to be alone");
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OF = "RV64";
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if (OF == "32bit")
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IsExtension = false;
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}
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if (OF == "32bit") {
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assert(ReqOpFeatures.size() == 1 && "Expected '32bit' to be alone");
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OF = "RV32";
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IsExtension = false;
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}
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// Convert features like "zbr" and "experimental-zbr" to "Zbr".
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OF.consume_front("experimental-");
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@ -4390,6 +4397,7 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
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// Error message
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FeatureMissing = true;
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Diag(TheCall->getBeginLoc(), diag::err_riscv_builtin_requires_extension)
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<< IsExtension
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<< TheCall->getSourceRange() << StringRef(FeatureStrs);
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}
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}
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@ -2,5 +2,5 @@
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// RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -verify %s -o -
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int orc_b_64(int a) {
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return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV64'}}
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return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires: 'RV64'}}
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}
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@ -3,10 +3,10 @@
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int zip(int rs1)
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{
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return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV32'}}
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return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
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}
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int unzip(int rs1)
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{
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return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV32'}}
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return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires: 'RV32'}}
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}
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