forked from OSchip/llvm-project
RegisterCoalescer: Remove phi-only subranges when erasing identity copies
Undef subranges are not present in the live range values, except when they cross block boundaries. In this situation, a identity copy is inside a loop, and one of the lanes is undefined. It only appears alive inside the loop due to the copy. Once the copy was erased, it would leave behind a segment inside the loop body with no corresponding def anywhere in the program. When RenameIndependentSubregs processed this dummy interval, it would introduce a "Multiple connected components in live interval" verifier error when IMPLICIT_DEFs were added to the other two blocks. I believe there is a missing verifier check for this type of dummy interval. I have found additional cases from the same fundamental problem in other areas I haven't managed to fix yet (e.g. the commented out prune_subrange_phi_value_* cases).
This commit is contained in:
Matt Arsenault
parent
f2966d17a2
commit
60eba8161b
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@ -211,6 +211,18 @@ namespace {
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/// live interval update is costly.
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void lateLiveIntervalUpdate();
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/// Check if the incoming value defined by a COPY at \p SLRQ in the subrange
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/// has no value defined in the predecessors. If the incoming value is the
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/// same as defined by the copy itself, the value is considered undefined.
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bool copyValueUndefInPredecessors(LiveRange &S,
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const MachineBasicBlock *MBB,
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LiveQueryResult SLRQ);
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/// Set necessary undef flags on subregister uses after pruning out undef
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/// lane segments from the subrange.
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void setUndefOnPrunedSubRegUses(LiveInterval &LI, Register Reg,
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LaneBitmask PrunedLanes);
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/// Attempt to join intervals corresponding to SrcReg/DstReg, which are the
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/// src/dst of the copy instruction CopyMI. This returns true if the copy
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/// was successfully coalesced away. If it is not currently possible to
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@ -1809,6 +1821,49 @@ bool RegisterCoalescer::canJoinPhys(const CoalescerPair &CP) {
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return false;
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}
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bool RegisterCoalescer::copyValueUndefInPredecessors(
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LiveRange &S, const MachineBasicBlock *MBB, LiveQueryResult SLRQ) {
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for (const MachineBasicBlock *Pred : MBB->predecessors()) {
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SlotIndex PredEnd = LIS->getMBBEndIdx(Pred);
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if (VNInfo *V = S.getVNInfoAt(PredEnd.getPrevSlot())) {
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// If this is a self loop, we may be reading the same value.
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if (V->id != SLRQ.valueOutOrDead()->id)
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return false;
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}
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}
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return true;
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}
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void RegisterCoalescer::setUndefOnPrunedSubRegUses(LiveInterval &LI,
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Register Reg,
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LaneBitmask PrunedLanes) {
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// If we had other instructions in the segment reading the undef sublane
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// value, we need to mark them with undef.
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for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
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unsigned SubRegIdx = MO.getSubReg();
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if (SubRegIdx == 0 || MO.isUndef())
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continue;
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LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(SubRegIdx);
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SlotIndex Pos = LIS->getInstructionIndex(*MO.getParent());
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for (LiveInterval::SubRange &S : LI.subranges()) {
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if (!S.liveAt(Pos) && (PrunedLanes & SubRegMask).any()) {
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MO.setIsUndef();
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break;
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}
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}
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}
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LI.removeEmptySubRanges();
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// A def of a subregister may be a use of other register lanes. Replacing
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// such a def with a def of a different register will eliminate the use,
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// and may cause the recorded live range to be larger than the actual
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// liveness in the program IR.
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LIS->shrinkToUses(&LI);
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}
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bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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Again = false;
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LLVM_DEBUG(dbgs() << LIS->getInstructionIndex(*CopyMI) << '\t' << *CopyMI);
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@ -1868,16 +1923,35 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
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VNInfo *ReadVNI = LRQ.valueIn();
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assert(ReadVNI && "No value before copy and no <undef> flag.");
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assert(ReadVNI != DefVNI && "Cannot read and define the same value.");
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LI.MergeValueNumberInto(DefVNI, ReadVNI);
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// Track incoming undef lanes we need to eliminate from the subrange.
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LaneBitmask PrunedLanes;
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MachineBasicBlock *MBB = CopyMI->getParent();
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// Process subregister liveranges.
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for (LiveInterval::SubRange &S : LI.subranges()) {
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LiveQueryResult SLRQ = S.Query(CopyIdx);
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if (VNInfo *SDefVNI = SLRQ.valueDefined()) {
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VNInfo *SReadVNI = SLRQ.valueIn();
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S.MergeValueNumberInto(SDefVNI, SReadVNI);
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if (VNInfo *SReadVNI = SLRQ.valueIn())
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SDefVNI = S.MergeValueNumberInto(SDefVNI, SReadVNI);
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// If this copy introduced an undef subrange from an incoming value,
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// we need to eliminate the undef live in values from the subrange.
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if (copyValueUndefInPredecessors(S, MBB, SLRQ)) {
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LLVM_DEBUG(dbgs() << "Incoming sublane value is undef at copy\n");
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PrunedLanes |= S.LaneMask;
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S.removeValNo(SDefVNI);
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}
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}
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}
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LI.MergeValueNumberInto(DefVNI, ReadVNI);
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if (PrunedLanes.any()) {
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LLVM_DEBUG(dbgs() << "Pruning undef incoming lanes: "
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<< PrunedLanes << '\n');
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setUndefOnPrunedSubRegUses(LI, CP.getSrcReg(), PrunedLanes);
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}
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LLVM_DEBUG(dbgs() << "\tMerged values: " << LI << '\n');
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}
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deleteInstr(CopyMI);
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@ -0,0 +1,338 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-coalescing -verify-machineinstrs -start-before=simple-register-coalescing -stop-after=machine-scheduler -o - %s | FileCheck %s
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# Tests that break due to the handling of partially undef registers
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# when whole register identity copies are erased.
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# Make sure there is no verifier error after
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# RenameIndepependentSubregs processes this. The coalescer would
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# remove the identity copy in %bb.1, and leave behind a dummy interval
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# across bb.1 with no corresponding value anywhere in the function.
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---
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name: identity_copy_undef_subrange
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: identity_copy_undef_subrange
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 %0.sub1, implicit $mode, implicit $exec
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; CHECK: S_BRANCH %bb.1
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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successors: %bb.2, %bb.1
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 killed %0.sub1, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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...
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# Test another use of the register inside the block.
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---
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name: identity_copy_undef_subrange_other_uses0
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: identity_copy_undef_subrange_other_uses0
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_NOP 0, implicit undef %0.sub0
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; CHECK: S_NOP 0, implicit undef %0.sub0
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 %0.sub1, implicit $mode, implicit $exec
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; CHECK: S_BRANCH %bb.1
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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successors: %bb.2, %bb.1
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%0:vreg_64 = COPY %0
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S_NOP 0, implicit %0.sub0
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S_NOP 0, implicit %0.sub0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 killed %0.sub1, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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...
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---
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name: second_identity_copy
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: second_identity_copy
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: undef %0.sub1:vreg_64 = nofpexcept V_MUL_F32_e32 0, %0.sub1, implicit $mode, implicit $exec
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; CHECK: S_BRANCH %bb.1
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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successors: %bb.2, %bb.1
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%0:vreg_64 = COPY killed %0
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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undef %0.sub1:vreg_64 = nofpexcept V_MUL_F32_e32 0, killed %0.sub1, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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...
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---
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name: second_identity_copy_undef_lane_outblock
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: second_identity_copy_undef_lane_outblock
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: S_BRANCH %bb.2
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; CHECK: bb.2:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: %0.sub1:vreg_64 = nofpexcept V_MUL_F32_e32 0, %0.sub1, implicit $mode, implicit $exec
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; CHECK: S_BRANCH %bb.1
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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successors: %bb.2, %bb.1
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%0:vreg_64 = COPY killed %0
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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%0.sub1:vreg_64 = nofpexcept V_MUL_F32_e32 0, killed %0.sub1, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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...
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# The same value number appears in multiple blocks
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---
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name: identity_copy_undef_subrange_null_vninfo_to_remove
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: identity_copy_undef_subrange_null_vninfo_to_remove
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.3(0x40000000), %bb.2(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.3, implicit $exec
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; CHECK: bb.2:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: S_NOP 0, implicit undef %0.sub0
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; CHECK: undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 %0.sub1, implicit $mode, implicit $exec
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; CHECK: S_BRANCH %bb.1
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; CHECK: bb.3:
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; CHECK: S_NOP 0, implicit undef %0.sub0
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.3, implicit $exec
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bb.2:
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S_NOP 0, implicit %0.sub0
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undef %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 killed %0.sub1, implicit $mode, implicit $exec
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S_BRANCH %bb.1
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bb.3:
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S_NOP 0, implicit %0.sub0
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...
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---
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name: undef_copy_self_loop0
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: undef_copy_self_loop0
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: bb.2:
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; CHECK: S_NOP 0, implicit undef %0.sub0
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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bb.2:
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S_NOP 0, implicit %0.sub0
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...
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---
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name: undef_copy_self_loop1
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: undef_copy_self_loop1
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $vgpr0
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; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
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; CHECK: bb.1:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
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; CHECK: bb.2:
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; CHECK: S_NOP 0, implicit %0.sub1
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bb.0:
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liveins: $vgpr0
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undef %0.sub1:vreg_64 = COPY killed $vgpr0
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bb.1:
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%0:vreg_64 = COPY %0
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S_CBRANCH_EXECNZ %bb.1, implicit $exec
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bb.2:
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S_NOP 0, implicit %0.sub1
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...
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# FIXME: This testcase is broken
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# The coalescing of the %0 = %2 COPY in %bb.2 needs to prune the dead
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# phi range across %bb.1 after it is erased.
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# ---
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# name: prune_subrange_phi_value_0
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# tracksRegLiveness: true
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# body: |
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# bb.0:
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# liveins: $vgpr0
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# undef %0.sub1:vreg_64 = COPY killed $vgpr0
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# bb.1:
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# successors: %bb.2, %bb.1
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# %1:vreg_64 = COPY killed %0
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# %0:vreg_64 = COPY %1
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# S_CBRANCH_EXECNZ %bb.1, implicit $exec
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# S_BRANCH %bb.2
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# bb.2:
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# undef %2.sub1:vreg_64 = COPY %0.sub1
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# %0:vreg_64 = COPY killed %2
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# S_BRANCH %bb.1
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# ...
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# Variant of testcase that asserts since there wasn't already an
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# incoming segment at the erased copy, and no valid end point.
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# ---
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# name: prune_subrange_phi_value_1
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# tracksRegLiveness: true
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# body: |
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# bb.0:
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# liveins: $vgpr0
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# undef %0.sub1:vreg_64 = COPY killed $vgpr0
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# bb.1:
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# successors: %bb.2, %bb.1
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# %0:vreg_64 = COPY killed %0
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# S_CBRANCH_EXECNZ %bb.1, implicit $exec
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# S_BRANCH %bb.2
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# bb.2:
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# undef %1.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 killed %0.sub1, implicit $mode, implicit $exec
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# %0:vreg_64 = COPY killed %1
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# S_BRANCH %bb.1
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# ...
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||||
---
|
||||
name: prune_subrange_phi_value_2
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
; CHECK-LABEL: name: prune_subrange_phi_value_2
|
||||
; CHECK: bb.0:
|
||||
; CHECK: successors: %bb.1(0x80000000)
|
||||
; CHECK: liveins: $vgpr0
|
||||
; CHECK: undef %0.sub1:vreg_64 = COPY $vgpr0
|
||||
; CHECK: bb.1:
|
||||
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
|
||||
; CHECK: S_CBRANCH_EXECNZ %bb.1, implicit $exec
|
||||
; CHECK: S_BRANCH %bb.2
|
||||
; CHECK: bb.2:
|
||||
; CHECK: successors: %bb.1(0x80000000)
|
||||
; CHECK: %0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 %0.sub1, implicit $mode, implicit $exec
|
||||
; CHECK: S_BRANCH %bb.1
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
|
||||
undef %0.sub1:vreg_64 = COPY killed $vgpr0
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.1
|
||||
|
||||
%0:vreg_64 = COPY killed %0
|
||||
S_CBRANCH_EXECNZ %bb.1, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
|
||||
bb.2:
|
||||
%0.sub1:vreg_64 = nofpexcept V_CEIL_F32_e32 %0.sub1, implicit $mode, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
|
||||
...
|
||||
Loading…
Reference in New Issue