forked from OSchip/llvm-project
parent
8dbd745b09
commit
60ea09eaca
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@ -118,8 +118,8 @@ bool EvexToVexInstPass::runOnMachineFunction(MachineFunction &MF) {
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/// EVEX encoded instrs by VEX encoding when possible.
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for (MachineBasicBlock &MBB : MF) {
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// Traverse the basic block.
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for (MachineInstr &MI : MBB)
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// Traverse the basic block.
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for (MachineInstr &MI : MBB)
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Changed |= CompressEvexToVexImpl(MI);
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}
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@ -147,18 +147,18 @@ bool EvexToVexInstPass::CompressEvexToVexImpl(MachineInstr &MI) const {
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// Check for EVEX instructions only.
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if ((Desc.TSFlags & X86II::EncodingMask) != X86II::EVEX)
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return false;
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// Check for EVEX instructions with mask or broadcast as in these cases
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// the EVEX prefix is needed in order to carry this information
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// Check for EVEX instructions with mask or broadcast as in these cases
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// the EVEX prefix is needed in order to carry this information
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// thus preventing the transformation to VEX encoding.
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if (Desc.TSFlags & (X86II::EVEX_K | X86II::EVEX_B))
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return false;
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// Check for non EVEX_V512 instrs only.
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// EVEX_V512 instr: bit EVEX_L2 = 1; bit VEX_L = 0.
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if ((Desc.TSFlags & X86II::EVEX_L2) && !(Desc.TSFlags & X86II::VEX_L))
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return false;
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return false;
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// EVEX_V128 instr: bit EVEX_L2 = 0, bit VEX_L = 0.
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bool IsEVEX_V128 =
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(!(Desc.TSFlags & X86II::EVEX_L2) && !(Desc.TSFlags & X86II::VEX_L));
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@ -213,11 +213,11 @@ bool EvexToVexInstPass::CompressEvexToVexImpl(MachineInstr &MI) const {
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if (isHiRegIdx(Reg))
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return false;
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}
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const MCInstrDesc &MCID = TII->get(NewOpc);
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MI.setDesc(MCID);
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MI.setAsmPrinterFlag(AC_EVEX_2_VEX);
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return true;
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return true;
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}
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INITIALIZE_PASS(EvexToVexInstPass, EVEX2VEX_NAME, EVEX2VEX_DESC, false, false)
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