forked from OSchip/llvm-project
[llvm-exegesis] Fix failing assert when creating Snippet for LAHF.
Reviewers: courbet Subscribers: tschuett, llvm-commits Differential Revision: https://reviews.llvm.org/D48123 llvm-svn: 334599
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@ -208,13 +208,17 @@ static void randomize(const Variable &Var, llvm::MCOperand &AssignedValue) {
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static void setRegisterOperandValue(const RegisterOperandAssignment &ROV,
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InstructionInstance &II) {
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assert(ROV.Op);
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assert(ROV.Op->IsExplicit);
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auto &AssignedValue = II.getValueFor(*ROV.Op);
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if (AssignedValue.isValid()) {
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assert(AssignedValue.isReg() && AssignedValue.getReg() == ROV.Reg);
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return;
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if (ROV.Op->IsExplicit) {
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auto &AssignedValue = II.getValueFor(*ROV.Op);
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if (AssignedValue.isValid()) {
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assert(AssignedValue.isReg() && AssignedValue.getReg() == ROV.Reg);
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return;
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}
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AssignedValue = llvm::MCOperand::createReg(ROV.Reg);
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} else {
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assert(ROV.Op->ImplicitReg != nullptr);
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assert(ROV.Reg == *ROV.Op->ImplicitReg);
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}
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AssignedValue = llvm::MCOperand::createReg(ROV.Reg);
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}
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size_t randomBit(const llvm::BitVector &Vector) {
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@ -103,11 +103,22 @@ TEST_F(LatencySnippetGeneratorTest, DependencyThroughOtherOpcode) {
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const unsigned Opcode = llvm::X86::CMP64rr;
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auto Conf = checkAndGetConfiguration(Opcode);
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EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through CMOVLE16rr"));
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EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through"));
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ASSERT_THAT(Conf.Snippet, testing::SizeIs(2));
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const llvm::MCInst Instr = Conf.Snippet[0];
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EXPECT_THAT(Instr.getOpcode(), Opcode);
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// TODO: check that the two instructions alias each other.
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}
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TEST_F(LatencySnippetGeneratorTest, LAHF) {
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const unsigned Opcode = llvm::X86::LAHF;
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auto Conf = checkAndGetConfiguration(Opcode);
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EXPECT_THAT(Conf.Info, testing::HasSubstr("cycle through"));
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ASSERT_THAT(Conf.Snippet, testing::SizeIs(2));
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const llvm::MCInst Instr = Conf.Snippet[0];
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EXPECT_THAT(Instr.getOpcode(), Opcode);
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}
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class UopsSnippetGeneratorTest : public X86SnippetGeneratorTest {
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protected:
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UopsSnippetGeneratorTest() : Runner(State) {}
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