forked from OSchip/llvm-project
Implement some hooks, make printOperand abort if unknown modifiers are
present. llvm-svn: 84613
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a5cb6da0cd
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60d5131653
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@ -33,15 +33,34 @@ void ARMInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
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void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
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const char *Modifier) {
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// FIXME: TURN ASSERT ON.
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//assert((Modifier == 0 || Modifier[0] == 0) && "Cannot print modifiers");
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const MCOperand &Op = MI->getOperand(OpNo);
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if (Op.isReg()) {
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O << getRegisterName(Op.getReg());
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unsigned Reg = Op.getReg();
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if (Modifier && strcmp(Modifier, "dregpair") == 0) {
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// FIXME: Breaks e.g. ARM/vmul.ll.
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assert(0);
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/*
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unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
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unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
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O << '{'
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<< getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi)
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<< '}';*/
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} else if (Modifier && strcmp(Modifier, "lane") == 0) {
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assert(0);
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/*
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unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg);
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unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1,
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&ARM::DPR_VFP2RegClass);
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O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
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*/
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} else {
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O << getRegisterName(Reg);
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}
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} else if (Op.isImm()) {
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assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
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O << '#' << Op.getImm();
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} else {
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assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
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assert(Op.isExpr() && "unknown operand kind in printOperand");
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Op.getExpr()->print(O, &MAI);
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}
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@ -143,6 +162,64 @@ void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op) {
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O << "]";
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}
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void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI,
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unsigned OpNum) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO2 = MI->getOperand(OpNum+1);
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if (!MO1.getReg()) {
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unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
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assert(ImmOffs && "Malformed indexed load / store!");
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O << '#' << (char)ARM_AM::getAM2Op(MO2.getImm()) << ImmOffs;
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return;
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}
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O << (char)ARM_AM::getAM2Op(MO2.getImm()) << getRegisterName(MO1.getReg());
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if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
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O << ", "
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<< ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
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<< " #" << ShImm;
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}
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void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned OpNum) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO2 = MI->getOperand(OpNum+1);
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const MCOperand &MO3 = MI->getOperand(OpNum+2);
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O << '[' << getRegisterName(MO1.getReg());
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if (MO2.getReg()) {
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O << ", " << (char)ARM_AM::getAM3Op(MO3.getImm())
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<< getRegisterName(MO2.getReg()) << ']';
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return;
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}
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if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
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O << ", #"
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<< (char)ARM_AM::getAM3Op(MO3.getImm())
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<< ImmOffs;
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O << ']';
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}
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void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI,
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unsigned OpNum) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO2 = MI->getOperand(OpNum+1);
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if (MO1.getReg()) {
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O << (char)ARM_AM::getAM3Op(MO2.getImm())
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<< getRegisterName(MO1.getReg());
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return;
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}
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unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
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assert(ImmOffs && "Malformed indexed load / store!");
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O << "#"
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<< (char)ARM_AM::getAM3Op(MO2.getImm())
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<< ImmOffs;
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}
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void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
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const char *Modifier) {
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@ -170,6 +247,44 @@ void ARMInstPrinter::printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
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}
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}
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void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
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const char *Modifier) {
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const MCOperand &MO1 = MI->getOperand(OpNum);
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const MCOperand &MO2 = MI->getOperand(OpNum+1);
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if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
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printOperand(MI, OpNum);
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return;
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}
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if (Modifier && strcmp(Modifier, "submode") == 0) {
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ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
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if (MO1.getReg() == ARM::SP) {
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bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
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MI->getOpcode() == ARM::FLDMS);
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O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
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} else
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O << ARM_AM::getAMSubModeStr(Mode);
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return;
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} else if (Modifier && strcmp(Modifier, "base") == 0) {
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// Used for FSTM{D|S} and LSTM{D|S} operations.
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O << getRegisterName(MO1.getReg());
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if (ARM_AM::getAM5WBFlag(MO2.getImm()))
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O << "!";
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return;
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}
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O << "[" << getRegisterName(MO1.getReg());
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if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
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O << ", #"
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<< (char)ARM_AM::getAM5Op(MO2.getImm())
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<< ImmOffs*4;
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}
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O << "]";
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}
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void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum) {
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O << "{";
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// Always skip the first operand, it's the optional (and implicit writeback).
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@ -201,6 +316,11 @@ void ARMInstPrinter::printCPInstOperand(const MCInst *MI, unsigned OpNum,
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abort();
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}
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void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum) {
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O << MI->getOperand(OpNum).getImm();
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}
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void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum) {
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// FIXME: remove this.
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abort();
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@ -40,13 +40,13 @@ public:
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void printSORegOperand(const MCInst *MI, unsigned OpNum);
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void printAddrMode2Operand(const MCInst *MI, unsigned OpNum);
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void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum) {}
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void printAddrMode3Operand(const MCInst *MI, unsigned OpNum) {}
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void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum) {}
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void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum);
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void printAddrMode3Operand(const MCInst *MI, unsigned OpNum);
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void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum);
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void printAddrMode4Operand(const MCInst *MI, unsigned OpNum,
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const char *Modifier = 0);
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void printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
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const char *Modifier = 0) {}
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const char *Modifier = 0);
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void printAddrMode6Operand(const MCInst *MI, unsigned OpNum) {}
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void printAddrModePCOperand(const MCInst *MI, unsigned OpNum,
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const char *Modifier = 0) {}
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@ -76,7 +76,7 @@ public:
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void printJTBlockOperand(const MCInst *MI, unsigned OpNum) {}
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void printJT2BlockOperand(const MCInst *MI, unsigned OpNum) {}
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void printTBAddrMode(const MCInst *MI, unsigned OpNum) {}
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void printNoHashImmediate(const MCInst *MI, unsigned OpNum) {}
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void printNoHashImmediate(const MCInst *MI, unsigned OpNum);
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void printPCLabel(const MCInst *MI, unsigned OpNum);
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// FIXME: Implement.
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