forked from OSchip/llvm-project
[NFC][Test] Format the test for IEEE Long double
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QingShan Zhang
parent
e0f4dea0d0
commit
60c28a5a2b
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@ -1,65 +1,197 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mcpu=a2 < %s | FileCheck %s -check-prefix=FPCVT
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; RUN: llc -verify-machineinstrs -mcpu=ppc64 < %s | FileCheck %s -check-prefix=PPC64
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 < %s | FileCheck %s -check-prefix=PWR9
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define float @fool(float %X) #0 {
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; FPCVT-LABEL: fool:
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; FPCVT: # %bb.0: # %entry
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; FPCVT-NEXT: friz 1, 1
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; FPCVT-NEXT: blr
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;
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; PPC64-LABEL: fool:
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; PPC64: # %bb.0: # %entry
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; PPC64-NEXT: fctidz 0, 1
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; PPC64-NEXT: fcfid 0, 0
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; PPC64-NEXT: frsp 1, 0
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; PPC64-NEXT: blr
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;
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; PWR9-LABEL: fool:
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; PWR9: # %bb.0: # %entry
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; PWR9-NEXT: xsrdpiz 1, 1
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; PWR9-NEXT: blr
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entry:
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%conv = fptosi float %X to i64
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%conv1 = sitofp i64 %conv to float
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ret float %conv1
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; FPCVT-LABEL: @fool
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; FPCVT: friz 1, 1
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; FPCVT: blr
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; PPC64-LABEL: @fool
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; PPC64: fctidz [[REG1:[0-9]+]], 1
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; PPC64: fcfid [[REG2:[0-9]+]], [[REG1]]
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; PPC64: frsp 1, [[REG2]]
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; PPC64: blr
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}
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; Function Attrs: nounwind readnone
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define double @foodl(double %X) #0 {
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; FPCVT-LABEL: foodl:
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; FPCVT: # %bb.0: # %entry
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; FPCVT-NEXT: friz 1, 1
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; FPCVT-NEXT: blr
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;
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; PPC64-LABEL: foodl:
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; PPC64: # %bb.0: # %entry
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; PPC64-NEXT: fctidz 0, 1
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; PPC64-NEXT: fcfid 1, 0
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; PPC64-NEXT: blr
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;
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; PWR9-LABEL: foodl:
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; PWR9: # %bb.0: # %entry
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; PWR9-NEXT: xsrdpiz 1, 1
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; PWR9-NEXT: blr
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entry:
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%conv = fptosi double %X to i64
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%conv1 = sitofp i64 %conv to double
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ret double %conv1
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; FPCVT-LABEL: @foodl
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; FPCVT: friz 1, 1
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; FPCVT: blr
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; PPC64-LABEL: @foodl
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; PPC64: fctidz [[REG1:[0-9]+]], 1
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; PPC64: fcfid 1, [[REG1]]
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; PPC64: blr
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}
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; Function Attrs: nounwind readnone
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define float @fooul(float %X) #0 {
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; FPCVT-LABEL: fooul:
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; FPCVT: # %bb.0: # %entry
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; FPCVT-NEXT: friz 1, 1
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; FPCVT-NEXT: blr
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;
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; PPC64-LABEL: fooul:
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; PPC64: # %bb.0: # %entry
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; PPC64-NEXT: addis 3, 2, .LCPI2_0@toc@ha
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; PPC64-NEXT: li 4, 1
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; PPC64-NEXT: lfs 0, .LCPI2_0@toc@l(3)
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; PPC64-NEXT: sldi 4, 4, 63
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; PPC64-NEXT: fsubs 2, 1, 0
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; PPC64-NEXT: fcmpu 0, 1, 0
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; PPC64-NEXT: fctidz 2, 2
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; PPC64-NEXT: stfd 2, -8(1)
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; PPC64-NEXT: fctidz 2, 1
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; PPC64-NEXT: stfd 2, -16(1)
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; PPC64-NEXT: ld 3, -8(1)
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; PPC64-NEXT: ld 5, -16(1)
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; PPC64-NEXT: xor 3, 3, 4
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; PPC64-NEXT: bc 12, 0, .LBB2_1
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; PPC64-NEXT: b .LBB2_2
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; PPC64-NEXT: .LBB2_1: # %entry
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; PPC64-NEXT: addi 3, 5, 0
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; PPC64-NEXT: .LBB2_2: # %entry
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; PPC64-NEXT: sradi 4, 3, 53
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; PPC64-NEXT: clrldi 5, 3, 63
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; PPC64-NEXT: addi 4, 4, 1
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; PPC64-NEXT: cmpldi 4, 1
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; PPC64-NEXT: rldicl 4, 3, 63, 1
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; PPC64-NEXT: or 5, 5, 4
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; PPC64-NEXT: rldicl 6, 5, 11, 53
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; PPC64-NEXT: addi 6, 6, 1
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; PPC64-NEXT: clrldi 7, 5, 53
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; PPC64-NEXT: cmpldi 1, 6, 1
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; PPC64-NEXT: clrldi 6, 3, 53
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; PPC64-NEXT: addi 7, 7, 2047
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; PPC64-NEXT: addi 6, 6, 2047
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; PPC64-NEXT: or 4, 7, 4
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; PPC64-NEXT: or 6, 6, 3
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; PPC64-NEXT: rldicl 4, 4, 53, 11
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; PPC64-NEXT: rldicr 6, 6, 0, 52
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; PPC64-NEXT: bc 12, 1, .LBB2_4
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; PPC64-NEXT: # %bb.3: # %entry
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; PPC64-NEXT: ori 6, 3, 0
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; PPC64-NEXT: b .LBB2_4
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; PPC64-NEXT: .LBB2_4: # %entry
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; PPC64-NEXT: rldicl 4, 4, 11, 1
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; PPC64-NEXT: cmpdi 3, 0
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; PPC64-NEXT: std 6, -32(1)
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; PPC64-NEXT: bc 12, 5, .LBB2_6
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; PPC64-NEXT: # %bb.5: # %entry
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; PPC64-NEXT: ori 4, 5, 0
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; PPC64-NEXT: b .LBB2_6
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; PPC64-NEXT: .LBB2_6: # %entry
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; PPC64-NEXT: std 4, -24(1)
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; PPC64-NEXT: bc 12, 0, .LBB2_8
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; PPC64-NEXT: # %bb.7: # %entry
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; PPC64-NEXT: lfd 0, -32(1)
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; PPC64-NEXT: fcfid 0, 0
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; PPC64-NEXT: frsp 1, 0
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; PPC64-NEXT: blr
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; PPC64-NEXT: .LBB2_8:
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; PPC64-NEXT: lfd 0, -24(1)
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; PPC64-NEXT: fcfid 0, 0
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; PPC64-NEXT: frsp 0, 0
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; PPC64-NEXT: fadds 1, 0, 0
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; PPC64-NEXT: blr
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;
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; PWR9-LABEL: fooul:
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; PWR9: # %bb.0: # %entry
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; PWR9-NEXT: xsrdpiz 1, 1
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; PWR9-NEXT: blr
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entry:
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%conv = fptoui float %X to i64
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%conv1 = uitofp i64 %conv to float
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ret float %conv1
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; FPCVT-LABEL: @fooul
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; FPCVT: friz 1, 1
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; FPCVT: blr
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}
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; Function Attrs: nounwind readnone
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define double @fooudl(double %X) #0 {
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; FPCVT-LABEL: fooudl:
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; FPCVT: # %bb.0: # %entry
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; FPCVT-NEXT: friz 1, 1
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; FPCVT-NEXT: blr
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;
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; PPC64-LABEL: fooudl:
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; PPC64: # %bb.0: # %entry
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; PPC64-NEXT: addis 3, 2, .LCPI3_0@toc@ha
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; PPC64-NEXT: li 4, 1
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; PPC64-NEXT: lfs 0, .LCPI3_0@toc@l(3)
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; PPC64-NEXT: sldi 4, 4, 63
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; PPC64-NEXT: fsub 2, 1, 0
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; PPC64-NEXT: fcmpu 0, 1, 0
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; PPC64-NEXT: fctidz 2, 2
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; PPC64-NEXT: stfd 2, -8(1)
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; PPC64-NEXT: fctidz 2, 1
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; PPC64-NEXT: stfd 2, -16(1)
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; PPC64-NEXT: ld 3, -8(1)
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; PPC64-NEXT: ld 5, -16(1)
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; PPC64-NEXT: xor 3, 3, 4
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; PPC64-NEXT: li 4, 1107
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; PPC64-NEXT: sldi 4, 4, 52
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; PPC64-NEXT: bc 12, 0, .LBB3_1
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; PPC64-NEXT: b .LBB3_2
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; PPC64-NEXT: .LBB3_1: # %entry
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; PPC64-NEXT: addi 3, 5, 0
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; PPC64-NEXT: .LBB3_2: # %entry
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; PPC64-NEXT: rldicl 5, 3, 32, 32
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; PPC64-NEXT: clrldi 3, 3, 32
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; PPC64-NEXT: or 4, 5, 4
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; PPC64-NEXT: addis 5, 2, .LCPI3_1@toc@ha
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; PPC64-NEXT: std 4, -24(1)
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; PPC64-NEXT: li 4, 1075
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; PPC64-NEXT: sldi 4, 4, 52
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; PPC64-NEXT: or 3, 3, 4
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; PPC64-NEXT: lfd 0, .LCPI3_1@toc@l(5)
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; PPC64-NEXT: std 3, -32(1)
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; PPC64-NEXT: lfd 1, -24(1)
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; PPC64-NEXT: lfd 2, -32(1)
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; PPC64-NEXT: fsub 0, 1, 0
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; PPC64-NEXT: fadd 1, 2, 0
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; PPC64-NEXT: blr
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;
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; PWR9-LABEL: fooudl:
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; PWR9: # %bb.0: # %entry
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; PWR9-NEXT: xsrdpiz 1, 1
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; PWR9-NEXT: blr
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entry:
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%conv = fptoui double %X to i64
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%conv1 = uitofp i64 %conv to double
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ret double %conv1
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; FPCVT-LABEL: @fooudl
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; FPCVT: friz 1, 1
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; FPCVT: blr
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}
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attributes #0 = { nounwind readnone "no-signed-zeros-fp-math"="true" }
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