forked from OSchip/llvm-project
[x86] add 16 missed hadd patterns (PR39195); NFC
llvm-svn: 343965
This commit is contained in:
Sanjay Patel
parent
b07407e6af
commit
60badd7584
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@ -449,3 +449,330 @@ define <8 x i32> @test17_undef(<8 x i32> %a, <8 x i32> %b) {
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%vecinit4 = insertelement <8 x i32> %vecinit3, i32 %add4, i32 3
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ret <8 x i32> %vecinit4
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}
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define <2 x double> @add_pd_003(<2 x double> %a, <2 x double> %b) {
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; SSE-LABEL: add_pd_003:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: addpd %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_pd_003:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%shuffle = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> <i32 undef, i32 0>
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%add = fadd <2 x double> %shuffle, %b
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ret <2 x double> %add
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}
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define <2 x double> @add_pd_005(<2 x double> %a, <2 x double> %b) {
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; SSE-LABEL: add_pd_005:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: addpd %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_pd_005:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%vecinit2 = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> <i32 undef, i32 0>
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%add = fadd <2 x double> %vecinit2, %b
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ret <2 x double> %add
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}
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define <2 x double> @add_pd_010(<2 x double> %a, <2 x double> %b) {
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; SSE-LABEL: add_pd_010:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: addpd %xmm1, %xmm0
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; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_pd_010:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; AVX-NEXT: retq
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%shuffle = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> <i32 undef, i32 0>
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%add = fadd <2 x double> %shuffle, %b
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%shuffle2 = shufflevector <2 x double> %add, <2 x double> undef, <2 x i32> <i32 1, i32 undef>
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ret <2 x double> %shuffle2
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}
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define <2 x double> @add_pd_012(<2 x double> %a, <2 x double> %b) {
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; SSE-LABEL: add_pd_012:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: addpd %xmm1, %xmm0
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; SSE-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_pd_012:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
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; AVX-NEXT: retq
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%vecinit2 = shufflevector <2 x double> %b, <2 x double> undef, <2 x i32> <i32 undef, i32 0>
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%add = fadd <2 x double> %vecinit2, %b
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%shuffle = shufflevector <2 x double> %add, <2 x double> undef, <2 x i32> <i32 1, i32 undef>
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ret <2 x double> %shuffle
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}
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define <4 x float> @add_ps_007(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_007:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,0,2]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_007:
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; AVX: # %bb.0:
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[0,1,0,2]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 2>
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%shuffle1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 3>
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%add = fadd <4 x float> %shuffle, %shuffle1
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_013(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_013:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,0,2]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_013:
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; AVX: # %bb.0:
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[0,1,0,2]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 2>
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%vecinit15 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 3>
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%add = fadd <4 x float> %vecinit6, %vecinit15
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_030(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_030:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,0,2]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_030:
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; AVX: # %bb.0:
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[0,1,0,2]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,2,3]
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 2>
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%shuffle1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 3>
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%add = fadd <4 x float> %shuffle, %shuffle1
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%shuffle2 = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
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ret <4 x float> %shuffle2
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}
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define <4 x float> @add_ps_036(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_036:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,0,2]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_036:
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; AVX: # %bb.0:
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[0,1,0,2]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,2,3]
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; AVX-NEXT: retq
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%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 2>
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%vecinit15 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 3>
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%add = fadd <4 x float> %vecinit6, %vecinit15
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%shuffle = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
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ret <4 x float> %shuffle
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}
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define <4 x float> @add_ps_007_2(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_007_2:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_007_2:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 undef>
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%shuffle1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 undef>
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%add = fadd <4 x float> %shuffle, %shuffle1
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_008(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_008:
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; SSE: # %bb.0:
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; SSE-NEXT: movsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_008:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = fadd <4 x float> %shuffle, %b
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_011(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_011:
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; SSE: # %bb.0:
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; SSE-NEXT: movddup {{.*#+}} xmm0 = xmm1[0,0]
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; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_011:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 undef>
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%vecinit15 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 undef>
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%add = fadd <4 x float> %vecinit6, %vecinit15
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_012(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_012:
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; SSE: # %bb.0:
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; SSE-NEXT: movsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_012:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = fadd <4 x float> %vecinit6, %b
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ret <4 x float> %add
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}
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define <4 x float> @add_ps_017(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_017:
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; SSE: # %bb.0:
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; SSE-NEXT: movsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_017:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = fadd <4 x float> %shuffle, %b
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%shuffle2 = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 3, i32 undef, i32 undef, i32 undef>
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ret <4 x float> %shuffle2
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}
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define <4 x float> @add_ps_018(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_018:
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; SSE: # %bb.0:
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; SSE-NEXT: movapd %xmm1, %xmm0
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; SSE-NEXT: movddup {{.*#+}} xmm1 = xmm1[0,0]
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_018:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
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; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; AVX-NEXT: retq
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%shuffle = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 undef>
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%shuffle1 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 undef>
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%add = fadd <4 x float> %shuffle, %shuffle1
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%shuffle2 = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 undef, i32 undef>
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ret <4 x float> %shuffle2
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}
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define <4 x float> @add_ps_021(<4 x float> %a, <4 x float> %b) {
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; SSE-LABEL: add_ps_021:
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; SSE: # %bb.0:
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; SSE-NEXT: movsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: add_ps_021:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm1[0,0,2,2]
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
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; AVX-NEXT: retq
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%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 2>
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%add = fadd <4 x float> %vecinit6, %b
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%shuffle = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 3, i32 undef, i32 undef, i32 undef>
|
||||
ret <4 x float> %shuffle
|
||||
}
|
||||
|
||||
define <4 x float> @add_ps_022(<4 x float> %a, <4 x float> %b) {
|
||||
; SSE-LABEL: add_ps_022:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: movapd %xmm1, %xmm0
|
||||
; SSE-NEXT: movddup {{.*#+}} xmm1 = xmm1[0,0]
|
||||
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1,1,3]
|
||||
; SSE-NEXT: addps %xmm1, %xmm0
|
||||
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX-LABEL: add_ps_022:
|
||||
; AVX: # %bb.0:
|
||||
; AVX-NEXT: vmovddup {{.*#+}} xmm0 = xmm1[0,0]
|
||||
; AVX-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,1,3]
|
||||
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
|
||||
; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX-NEXT: retq
|
||||
%vecinit6 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 undef>
|
||||
%vecinit15 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 undef>
|
||||
%add = fadd <4 x float> %vecinit6, %vecinit15
|
||||
%shuffle = shufflevector <4 x float> %add, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 undef, i32 undef>
|
||||
ret <4 x float> %shuffle
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue