forked from OSchip/llvm-project
[PowerPC] Use SDNode::uses (NFC)
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33af58937b
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609ccbb240
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@ -6276,9 +6276,7 @@ void PPCDAGToDAGISel::PostprocessISelDAG() {
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// be folded with the isel so that we don't need to materialize a register
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// containing zero.
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bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
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for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (const SDNode *User : N->uses()) {
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if (!User->isMachineOpcode())
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return false;
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if (User->getMachineOpcode() != PPC::SELECT_I4 &&
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@ -6312,18 +6310,14 @@ bool PPCDAGToDAGISel::AllUsersSelectZero(SDNode *N) {
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void PPCDAGToDAGISel::SwapAllSelectUsers(SDNode *N) {
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SmallVector<SDNode *, 4> ToReplace;
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for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (SDNode *User : N->uses()) {
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assert((User->getMachineOpcode() == PPC::SELECT_I4 ||
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User->getMachineOpcode() == PPC::SELECT_I8) &&
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"Must have all select users");
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ToReplace.push_back(User);
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}
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for (SmallVector<SDNode *, 4>::iterator UI = ToReplace.begin(),
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UE = ToReplace.end(); UI != UE; ++UI) {
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SDNode *User = *UI;
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for (SDNode *User : ToReplace) {
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SDNode *ResNode =
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CurDAG->getMachineNode(User->getMachineOpcode(), SDLoc(User),
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User->getValueType(0), User->getOperand(0),
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@ -2570,9 +2570,8 @@ static bool provablyDisjointOr(SelectionDAG &DAG, const SDValue &N) {
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bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
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SDValue &Index,
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SelectionDAG &DAG) const {
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for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end();
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UI != E; ++UI) {
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if (MemSDNode *Memop = dyn_cast<MemSDNode>(*UI)) {
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for (SDNode *U : N->uses()) {
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if (MemSDNode *Memop = dyn_cast<MemSDNode>(U)) {
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if (Memop->getMemoryVT() == MVT::f64) {
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Base = N.getOperand(0);
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Index = N.getOperand(1);
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@ -13205,12 +13204,12 @@ static bool findConsecutiveLoad(LoadSDNode *LD, SelectionDAG &DAG) {
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if (isConsecutiveLS(ChainLD, LD, VT.getStoreSize(), 1, DAG))
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return true;
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for (SDNode::use_iterator UI = LoadRoot->use_begin(),
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UE = LoadRoot->use_end(); UI != UE; ++UI)
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if (((isa<MemSDNode>(*UI) &&
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cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) ||
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UI->getOpcode() == ISD::TokenFactor) && !Visited.count(*UI))
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Queue.push_back(*UI);
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for (SDNode *U : LoadRoot->uses())
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if (((isa<MemSDNode>(U) &&
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cast<MemSDNode>(U)->getChain().getNode() == LoadRoot) ||
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U->getOpcode() == ISD::TokenFactor) &&
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!Visited.count(U))
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Queue.push_back(U);
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}
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}
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@ -13267,11 +13266,9 @@ SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
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// If all users of SETCC extend its value to a legal integer type
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// then we replace SETCC with a subtraction
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for (SDNode::use_iterator UI = N->use_begin(),
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UE = N->use_end(); UI != UE; ++UI) {
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if (UI->getOpcode() != ISD::ZERO_EXTEND)
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for (const SDNode *U : N->uses())
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if (U->getOpcode() != ISD::ZERO_EXTEND)
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return SDValue();
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}
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ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
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auto OpSize = N->getOperand(0).getValueSizeInBits();
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@ -13448,10 +13445,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
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if (isa<ConstantSDNode>(Inputs[i]))
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continue;
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for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
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UE = Inputs[i].getNode()->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (const SDNode *User : Inputs[i].getNode()->uses()) {
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if (User != N && !Visited.count(User))
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return SDValue();
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@ -13472,10 +13466,7 @@ SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
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}
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for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
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for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
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UE = PromOps[i].getNode()->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (const SDNode *User : PromOps[i].getNode()->uses()) {
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if (User != N && !Visited.count(User))
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return SDValue();
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@ -13660,10 +13651,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
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if (isa<ConstantSDNode>(Inputs[i]))
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continue;
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for (SDNode::use_iterator UI = Inputs[i].getNode()->use_begin(),
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UE = Inputs[i].getNode()->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (SDNode *User : Inputs[i].getNode()->uses()) {
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if (User != N && !Visited.count(User))
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return SDValue();
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@ -13685,10 +13673,7 @@ SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
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}
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for (unsigned i = 0, ie = PromOps.size(); i != ie; ++i) {
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for (SDNode::use_iterator UI = PromOps[i].getNode()->use_begin(),
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UE = PromOps[i].getNode()->use_end();
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UI != UE; ++UI) {
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SDNode *User = *UI;
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for (SDNode *User : PromOps[i].getNode()->uses()) {
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if (User != N && !Visited.count(User))
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return SDValue();
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@ -15383,36 +15368,33 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
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APInt::getAllOnes(Bits /* alignment */)
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.zext(Add.getScalarValueSizeInBits()))) {
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SDNode *BasePtr = Add->getOperand(0).getNode();
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for (SDNode::use_iterator UI = BasePtr->use_begin(),
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UE = BasePtr->use_end();
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UI != UE; ++UI) {
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if (UI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
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cast<ConstantSDNode>(UI->getOperand(0))->getZExtValue() ==
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IID) {
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for (SDNode *U : BasePtr->uses()) {
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if (U->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
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cast<ConstantSDNode>(U->getOperand(0))->getZExtValue() == IID) {
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// We've found another LVSL/LVSR, and this address is an aligned
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// multiple of that one. The results will be the same, so use the
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// one we've just found instead.
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return SDValue(*UI, 0);
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return SDValue(U, 0);
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}
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}
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}
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if (isa<ConstantSDNode>(Add->getOperand(1))) {
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SDNode *BasePtr = Add->getOperand(0).getNode();
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for (SDNode::use_iterator UI = BasePtr->use_begin(),
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UE = BasePtr->use_end(); UI != UE; ++UI) {
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if (UI->getOpcode() == ISD::ADD &&
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isa<ConstantSDNode>(UI->getOperand(1)) &&
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for (SDNode *U : BasePtr->uses()) {
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if (U->getOpcode() == ISD::ADD &&
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isa<ConstantSDNode>(U->getOperand(1)) &&
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(cast<ConstantSDNode>(Add->getOperand(1))->getZExtValue() -
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cast<ConstantSDNode>(UI->getOperand(1))->getZExtValue()) %
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(1ULL << Bits) == 0) {
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SDNode *OtherAdd = *UI;
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for (SDNode::use_iterator VI = OtherAdd->use_begin(),
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VE = OtherAdd->use_end(); VI != VE; ++VI) {
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if (VI->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
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cast<ConstantSDNode>(VI->getOperand(0))->getZExtValue() == IID) {
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return SDValue(*VI, 0);
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cast<ConstantSDNode>(U->getOperand(1))->getZExtValue()) %
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(1ULL << Bits) ==
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0) {
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SDNode *OtherAdd = U;
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for (SDNode *V : OtherAdd->uses()) {
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if (V->getOpcode() == ISD::INTRINSIC_WO_CHAIN &&
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cast<ConstantSDNode>(V->getOperand(0))->getZExtValue() ==
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IID) {
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return SDValue(V, 0);
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}
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}
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}
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