forked from OSchip/llvm-project
[RISCV] Add test cases for inline memcpy expansion
Test file was taken directly from AArch64/ARM. I've added RUN lines for aligned and unaligned since many of the test cases are strings that aren't aligned and have an odd size. Some of these test cases are modified by D129402. Differential Revision: https://reviews.llvm.org/D129403
This commit is contained in:
Craig Topper
parent
28b41237e6
commit
60450f91c8
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@ -0,0 +1,405 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv32 \
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; RUN: | FileCheck %s --check-prefixes=RV32,RV32ALIGNED
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; RUN: llc < %s -mtriple=riscv64 \
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; RUN: | FileCheck %s --check-prefixes=RV64,RV64ALIGNED
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; RUN: llc < %s -mtriple=riscv32 -mattr=+unaligned-scalar-mem \
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; RUN: | FileCheck %s --check-prefixes=RV32,RV32UNALIGNED
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; RUN: llc < %s -mtriple=riscv64 -mattr=+unaligned-scalar-mem \
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; RUN: | FileCheck %s --check-prefixes=RV64,RV64UNALIGNED
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%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
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@src = external dso_local global %struct.x
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@dst = external dso_local global %struct.x
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@.str1 = private unnamed_addr constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 1
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@.str2 = private unnamed_addr constant [36 x i8] c"DHRYSTONE PROGRAM, SOME STRING BLAH\00", align 1
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@.str3 = private unnamed_addr constant [24 x i8] c"DHRYSTONE PROGRAM, SOME\00", align 1
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@.str4 = private unnamed_addr constant [18 x i8] c"DHRYSTONE PROGR \00", align 1
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@.str5 = private unnamed_addr constant [7 x i8] c"DHRYST\00", align 1
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@.str6 = private unnamed_addr constant [14 x i8] c"/tmp/rmXXXXXX\00", align 1
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@spool.splbuf = internal global [512 x i8] zeroinitializer, align 16
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define i32 @t0() {
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; RV32-LABEL: t0:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: lui a0, %hi(src)
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; RV32-NEXT: lw a1, %lo(src)(a0)
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; RV32-NEXT: lui a2, %hi(dst)
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; RV32-NEXT: sw a1, %lo(dst)(a2)
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; RV32-NEXT: addi a0, a0, %lo(src)
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; RV32-NEXT: lb a1, 10(a0)
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; RV32-NEXT: lh a3, 8(a0)
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; RV32-NEXT: lw a0, 4(a0)
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; RV32-NEXT: addi a2, a2, %lo(dst)
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; RV32-NEXT: sb a1, 10(a2)
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; RV32-NEXT: sh a3, 8(a2)
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; RV32-NEXT: sw a0, 4(a2)
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; RV32-NEXT: li a0, 0
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; RV32-NEXT: ret
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;
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; RV64-LABEL: t0:
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; RV64: # %bb.0: # %entry
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; RV64-NEXT: lui a0, %hi(src)
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; RV64-NEXT: ld a1, %lo(src)(a0)
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; RV64-NEXT: lui a2, %hi(dst)
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; RV64-NEXT: addi a0, a0, %lo(src)
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; RV64-NEXT: lb a3, 10(a0)
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; RV64-NEXT: lh a0, 8(a0)
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; RV64-NEXT: sd a1, %lo(dst)(a2)
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; RV64-NEXT: addi a1, a2, %lo(dst)
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; RV64-NEXT: sb a3, 10(a1)
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; RV64-NEXT: sh a0, 8(a1)
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; RV64-NEXT: li a0, 0
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; RV64-NEXT: ret
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entry:
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @dst, i32 0, i32 0), i8* align 8 getelementptr inbounds (%struct.x, %struct.x* @src, i32 0, i32 0), i32 11, i1 false)
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ret i32 0
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}
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define void @t1(i8* nocapture %C) nounwind {
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; RV32-LABEL: t1:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: lui a1, %hi(.L.str1)
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; RV32-NEXT: addi a1, a1, %lo(.L.str1)
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; RV32-NEXT: li a2, 31
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; RV32-NEXT: tail memcpy@plt
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;
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; RV64ALIGNED-LABEL: t1:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: lui a1, %hi(.L.str1)
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; RV64ALIGNED-NEXT: addi a1, a1, %lo(.L.str1)
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; RV64ALIGNED-NEXT: li a2, 31
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; RV64ALIGNED-NEXT: tail memcpy@plt
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;
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; RV64UNALIGNED-LABEL: t1:
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; RV64UNALIGNED: # %bb.0: # %entry
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; RV64UNALIGNED-NEXT: lui a1, 4
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; RV64UNALIGNED-NEXT: addiw a1, a1, 1870
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; RV64UNALIGNED-NEXT: sh a1, 28(a0)
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; RV64UNALIGNED-NEXT: lui a1, 300325
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; RV64UNALIGNED-NEXT: addiw a1, a1, 1107
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; RV64UNALIGNED-NEXT: sw a1, 24(a0)
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; RV64UNALIGNED-NEXT: lui a1, %hi(.LCPI1_0)
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; RV64UNALIGNED-NEXT: ld a1, %lo(.LCPI1_0)(a1)
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; RV64UNALIGNED-NEXT: lui a2, %hi(.LCPI1_1)
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; RV64UNALIGNED-NEXT: ld a2, %lo(.LCPI1_1)(a2)
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; RV64UNALIGNED-NEXT: lui a3, %hi(.LCPI1_2)
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; RV64UNALIGNED-NEXT: ld a3, %lo(.LCPI1_2)(a3)
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; RV64UNALIGNED-NEXT: sd a1, 16(a0)
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; RV64UNALIGNED-NEXT: sd a2, 8(a0)
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; RV64UNALIGNED-NEXT: sb zero, 30(a0)
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; RV64UNALIGNED-NEXT: sd a3, 0(a0)
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; RV64UNALIGNED-NEXT: ret
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str1, i64 0, i64 0), i64 31, i1 false)
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ret void
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}
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define void @t2(i8* nocapture %C) nounwind {
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; RV32-LABEL: t2:
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; RV32: # %bb.0: # %entry
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; RV32-NEXT: lui a1, %hi(.L.str2)
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; RV32-NEXT: addi a1, a1, %lo(.L.str2)
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; RV32-NEXT: li a2, 36
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; RV32-NEXT: tail memcpy@plt
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;
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; RV64ALIGNED-LABEL: t2:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: lui a1, %hi(.L.str2)
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; RV64ALIGNED-NEXT: addi a1, a1, %lo(.L.str2)
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; RV64ALIGNED-NEXT: li a2, 36
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; RV64ALIGNED-NEXT: tail memcpy@plt
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;
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; RV64UNALIGNED-LABEL: t2:
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; RV64UNALIGNED: # %bb.0: # %entry
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; RV64UNALIGNED-NEXT: lui a1, 1156
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; RV64UNALIGNED-NEXT: addiw a1, a1, 332
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; RV64UNALIGNED-NEXT: sw a1, 32(a0)
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; RV64UNALIGNED-NEXT: lui a1, %hi(.LCPI2_0)
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; RV64UNALIGNED-NEXT: ld a1, %lo(.LCPI2_0)(a1)
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; RV64UNALIGNED-NEXT: lui a2, %hi(.LCPI2_1)
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; RV64UNALIGNED-NEXT: ld a2, %lo(.LCPI2_1)(a2)
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; RV64UNALIGNED-NEXT: lui a3, %hi(.LCPI2_2)
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; RV64UNALIGNED-NEXT: ld a3, %lo(.LCPI2_2)(a3)
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; RV64UNALIGNED-NEXT: lui a4, %hi(.LCPI2_3)
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; RV64UNALIGNED-NEXT: ld a4, %lo(.LCPI2_3)(a4)
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; RV64UNALIGNED-NEXT: sd a1, 24(a0)
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; RV64UNALIGNED-NEXT: sd a2, 16(a0)
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; RV64UNALIGNED-NEXT: sd a3, 8(a0)
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; RV64UNALIGNED-NEXT: sd a4, 0(a0)
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; RV64UNALIGNED-NEXT: ret
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str2, i64 0, i64 0), i64 36, i1 false)
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ret void
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}
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define void @t3(i8* nocapture %C) nounwind {
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; RV32ALIGNED-LABEL: t3:
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; RV32ALIGNED: # %bb.0: # %entry
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; RV32ALIGNED-NEXT: lui a1, %hi(.L.str3)
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; RV32ALIGNED-NEXT: addi a1, a1, %lo(.L.str3)
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; RV32ALIGNED-NEXT: li a2, 24
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; RV32ALIGNED-NEXT: tail memcpy@plt
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;
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; RV64ALIGNED-LABEL: t3:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: lui a1, %hi(.L.str3)
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; RV64ALIGNED-NEXT: addi a1, a1, %lo(.L.str3)
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; RV64ALIGNED-NEXT: li a2, 24
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; RV64ALIGNED-NEXT: tail memcpy@plt
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;
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; RV32UNALIGNED-LABEL: t3:
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; RV32UNALIGNED: # %bb.0: # %entry
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; RV32UNALIGNED-NEXT: lui a1, 1109
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; RV32UNALIGNED-NEXT: addi a1, a1, -689
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; RV32UNALIGNED-NEXT: sw a1, 20(a0)
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; RV32UNALIGNED-NEXT: lui a1, 340483
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; RV32UNALIGNED-NEXT: addi a1, a1, -947
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; RV32UNALIGNED-NEXT: sw a1, 16(a0)
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; RV32UNALIGNED-NEXT: lui a1, 267556
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; RV32UNALIGNED-NEXT: addi a1, a1, 1871
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; RV32UNALIGNED-NEXT: sw a1, 12(a0)
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; RV32UNALIGNED-NEXT: lui a1, 337154
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; RV32UNALIGNED-NEXT: addi a1, a1, 69
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; RV32UNALIGNED-NEXT: sw a1, 8(a0)
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; RV32UNALIGNED-NEXT: lui a1, 320757
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; RV32UNALIGNED-NEXT: addi a1, a1, 1107
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; RV32UNALIGNED-NEXT: sw a1, 4(a0)
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; RV32UNALIGNED-NEXT: lui a1, 365861
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; RV32UNALIGNED-NEXT: addi a1, a1, -1980
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; RV32UNALIGNED-NEXT: sw a1, 0(a0)
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; RV32UNALIGNED-NEXT: ret
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;
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; RV64UNALIGNED-LABEL: t3:
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; RV64UNALIGNED: # %bb.0: # %entry
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; RV64UNALIGNED-NEXT: lui a1, %hi(.LCPI3_0)
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; RV64UNALIGNED-NEXT: ld a1, %lo(.LCPI3_0)(a1)
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; RV64UNALIGNED-NEXT: lui a2, %hi(.LCPI3_1)
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; RV64UNALIGNED-NEXT: ld a2, %lo(.LCPI3_1)(a2)
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; RV64UNALIGNED-NEXT: lui a3, %hi(.LCPI3_2)
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; RV64UNALIGNED-NEXT: ld a3, %lo(.LCPI3_2)(a3)
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; RV64UNALIGNED-NEXT: sd a1, 16(a0)
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; RV64UNALIGNED-NEXT: sd a2, 8(a0)
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; RV64UNALIGNED-NEXT: sd a3, 0(a0)
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; RV64UNALIGNED-NEXT: ret
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str3, i64 0, i64 0), i64 24, i1 false)
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ret void
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}
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define void @t4(i8* nocapture %C) nounwind {
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; RV32ALIGNED-LABEL: t4:
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; RV32ALIGNED: # %bb.0: # %entry
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; RV32ALIGNED-NEXT: lui a1, %hi(.L.str4)
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; RV32ALIGNED-NEXT: addi a1, a1, %lo(.L.str4)
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; RV32ALIGNED-NEXT: li a2, 18
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; RV32ALIGNED-NEXT: tail memcpy@plt
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;
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; RV64ALIGNED-LABEL: t4:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: lui a1, %hi(.L.str4)
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; RV64ALIGNED-NEXT: addi a1, a1, %lo(.L.str4)
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; RV64ALIGNED-NEXT: li a2, 18
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; RV64ALIGNED-NEXT: tail memcpy@plt
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;
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; RV32UNALIGNED-LABEL: t4:
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; RV32UNALIGNED: # %bb.0: # %entry
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; RV32UNALIGNED-NEXT: li a1, 32
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; RV32UNALIGNED-NEXT: sh a1, 16(a0)
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; RV32UNALIGNED-NEXT: lui a1, 132388
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; RV32UNALIGNED-NEXT: addi a1, a1, 1871
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; RV32UNALIGNED-NEXT: sw a1, 12(a0)
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; RV32UNALIGNED-NEXT: lui a1, 337154
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; RV32UNALIGNED-NEXT: addi a1, a1, 69
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; RV32UNALIGNED-NEXT: sw a1, 8(a0)
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; RV32UNALIGNED-NEXT: lui a1, 320757
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; RV32UNALIGNED-NEXT: addi a1, a1, 1107
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; RV32UNALIGNED-NEXT: sw a1, 4(a0)
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; RV32UNALIGNED-NEXT: lui a1, 365861
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; RV32UNALIGNED-NEXT: addi a1, a1, -1980
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; RV32UNALIGNED-NEXT: sw a1, 0(a0)
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; RV32UNALIGNED-NEXT: ret
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;
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; RV64UNALIGNED-LABEL: t4:
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; RV64UNALIGNED: # %bb.0: # %entry
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; RV64UNALIGNED-NEXT: lui a1, %hi(.LCPI4_0)
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; RV64UNALIGNED-NEXT: ld a1, %lo(.LCPI4_0)(a1)
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; RV64UNALIGNED-NEXT: lui a2, %hi(.LCPI4_1)
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; RV64UNALIGNED-NEXT: ld a2, %lo(.LCPI4_1)(a2)
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; RV64UNALIGNED-NEXT: li a3, 32
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; RV64UNALIGNED-NEXT: sh a3, 16(a0)
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; RV64UNALIGNED-NEXT: sd a1, 8(a0)
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; RV64UNALIGNED-NEXT: sd a2, 0(a0)
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; RV64UNALIGNED-NEXT: ret
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str4, i64 0, i64 0), i64 18, i1 false)
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ret void
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}
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define void @t5(i8* nocapture %C) nounwind {
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; RV32ALIGNED-LABEL: t5:
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; RV32ALIGNED: # %bb.0: # %entry
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; RV32ALIGNED-NEXT: sb zero, 6(a0)
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; RV32ALIGNED-NEXT: li a1, 84
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; RV32ALIGNED-NEXT: sb a1, 5(a0)
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; RV32ALIGNED-NEXT: li a1, 83
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; RV32ALIGNED-NEXT: sb a1, 4(a0)
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; RV32ALIGNED-NEXT: li a1, 89
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; RV32ALIGNED-NEXT: sb a1, 3(a0)
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; RV32ALIGNED-NEXT: li a1, 82
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; RV32ALIGNED-NEXT: sb a1, 2(a0)
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; RV32ALIGNED-NEXT: li a1, 72
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; RV32ALIGNED-NEXT: sb a1, 1(a0)
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; RV32ALIGNED-NEXT: li a1, 68
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; RV32ALIGNED-NEXT: sb a1, 0(a0)
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; RV32ALIGNED-NEXT: ret
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;
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; RV64ALIGNED-LABEL: t5:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: sb zero, 6(a0)
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; RV64ALIGNED-NEXT: li a1, 84
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; RV64ALIGNED-NEXT: sb a1, 5(a0)
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; RV64ALIGNED-NEXT: li a1, 83
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; RV64ALIGNED-NEXT: sb a1, 4(a0)
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; RV64ALIGNED-NEXT: li a1, 89
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; RV64ALIGNED-NEXT: sb a1, 3(a0)
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; RV64ALIGNED-NEXT: li a1, 82
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; RV64ALIGNED-NEXT: sb a1, 2(a0)
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; RV64ALIGNED-NEXT: li a1, 72
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; RV64ALIGNED-NEXT: sb a1, 1(a0)
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; RV64ALIGNED-NEXT: li a1, 68
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; RV64ALIGNED-NEXT: sb a1, 0(a0)
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; RV64ALIGNED-NEXT: ret
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;
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; RV32UNALIGNED-LABEL: t5:
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; RV32UNALIGNED: # %bb.0: # %entry
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; RV32UNALIGNED-NEXT: sb zero, 6(a0)
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; RV32UNALIGNED-NEXT: lui a1, 5
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; RV32UNALIGNED-NEXT: addi a1, a1, 1107
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; RV32UNALIGNED-NEXT: sh a1, 4(a0)
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; RV32UNALIGNED-NEXT: lui a1, 365861
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; RV32UNALIGNED-NEXT: addi a1, a1, -1980
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; RV32UNALIGNED-NEXT: sw a1, 0(a0)
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; RV32UNALIGNED-NEXT: ret
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;
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; RV64UNALIGNED-LABEL: t5:
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; RV64UNALIGNED: # %bb.0: # %entry
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; RV64UNALIGNED-NEXT: sb zero, 6(a0)
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; RV64UNALIGNED-NEXT: lui a1, 5
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; RV64UNALIGNED-NEXT: addiw a1, a1, 1107
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; RV64UNALIGNED-NEXT: sh a1, 4(a0)
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; RV64UNALIGNED-NEXT: lui a1, 365861
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; RV64UNALIGNED-NEXT: addiw a1, a1, -1980
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; RV64UNALIGNED-NEXT: sw a1, 0(a0)
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; RV64UNALIGNED-NEXT: ret
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entry:
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tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %C, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str5, i64 0, i64 0), i64 7, i1 false)
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ret void
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}
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define void @t6() nounwind {
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; RV32ALIGNED-LABEL: t6:
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; RV32ALIGNED: # %bb.0: # %entry
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; RV32ALIGNED-NEXT: addi sp, sp, -16
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; RV32ALIGNED-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32ALIGNED-NEXT: lui a0, %hi(spool.splbuf)
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; RV32ALIGNED-NEXT: addi a0, a0, %lo(spool.splbuf)
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; RV32ALIGNED-NEXT: lui a1, %hi(.L.str6)
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; RV32ALIGNED-NEXT: addi a1, a1, %lo(.L.str6)
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; RV32ALIGNED-NEXT: li a2, 14
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; RV32ALIGNED-NEXT: call memcpy@plt
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; RV32ALIGNED-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
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; RV32ALIGNED-NEXT: addi sp, sp, 16
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; RV32ALIGNED-NEXT: ret
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;
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; RV64ALIGNED-LABEL: t6:
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; RV64ALIGNED: # %bb.0: # %entry
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; RV64ALIGNED-NEXT: addi sp, sp, -16
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; RV64ALIGNED-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64ALIGNED-NEXT: lui a0, %hi(spool.splbuf)
|
||||
; RV64ALIGNED-NEXT: addi a0, a0, %lo(spool.splbuf)
|
||||
; RV64ALIGNED-NEXT: lui a1, %hi(.L.str6)
|
||||
; RV64ALIGNED-NEXT: addi a1, a1, %lo(.L.str6)
|
||||
; RV64ALIGNED-NEXT: li a2, 14
|
||||
; RV64ALIGNED-NEXT: call memcpy@plt
|
||||
; RV64ALIGNED-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
|
||||
; RV64ALIGNED-NEXT: addi sp, sp, 16
|
||||
; RV64ALIGNED-NEXT: ret
|
||||
;
|
||||
; RV32UNALIGNED-LABEL: t6:
|
||||
; RV32UNALIGNED: # %bb.0: # %entry
|
||||
; RV32UNALIGNED-NEXT: lui a0, %hi(spool.splbuf)
|
||||
; RV32UNALIGNED-NEXT: li a1, 88
|
||||
; RV32UNALIGNED-NEXT: sh a1, %lo(spool.splbuf+12)(a0)
|
||||
; RV32UNALIGNED-NEXT: lui a1, 361862
|
||||
; RV32UNALIGNED-NEXT: addi a1, a1, -1960
|
||||
; RV32UNALIGNED-NEXT: sw a1, %lo(spool.splbuf+8)(a0)
|
||||
; RV32UNALIGNED-NEXT: lui a1, 362199
|
||||
; RV32UNALIGNED-NEXT: addi a1, a1, 559
|
||||
; RV32UNALIGNED-NEXT: sw a1, %lo(spool.splbuf+4)(a0)
|
||||
; RV32UNALIGNED-NEXT: lui a1, 460503
|
||||
; RV32UNALIGNED-NEXT: addi a1, a1, 1071
|
||||
; RV32UNALIGNED-NEXT: sw a1, %lo(spool.splbuf)(a0)
|
||||
; RV32UNALIGNED-NEXT: ret
|
||||
;
|
||||
; RV64UNALIGNED-LABEL: t6:
|
||||
; RV64UNALIGNED: # %bb.0: # %entry
|
||||
; RV64UNALIGNED-NEXT: lui a0, %hi(spool.splbuf)
|
||||
; RV64UNALIGNED-NEXT: li a1, 88
|
||||
; RV64UNALIGNED-NEXT: sh a1, %lo(spool.splbuf+12)(a0)
|
||||
; RV64UNALIGNED-NEXT: lui a1, %hi(.LCPI6_0)
|
||||
; RV64UNALIGNED-NEXT: ld a1, %lo(.LCPI6_0)(a1)
|
||||
; RV64UNALIGNED-NEXT: lui a2, 361862
|
||||
; RV64UNALIGNED-NEXT: addiw a2, a2, -1960
|
||||
; RV64UNALIGNED-NEXT: sw a2, %lo(spool.splbuf+8)(a0)
|
||||
; RV64UNALIGNED-NEXT: sd a1, %lo(spool.splbuf)(a0)
|
||||
; RV64UNALIGNED-NEXT: ret
|
||||
entry:
|
||||
call void @llvm.memcpy.p0i8.p0i8.i64(i8* getelementptr inbounds ([512 x i8], [512 x i8]* @spool.splbuf, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str6, i64 0, i64 0), i64 14, i1 false)
|
||||
ret void
|
||||
}
|
||||
|
||||
%struct.Foo = type { i32, i32, i32, i32 }
|
||||
|
||||
define void @t7(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
|
||||
; RV32-LABEL: t7:
|
||||
; RV32: # %bb.0: # %entry
|
||||
; RV32-NEXT: lw a2, 12(a1)
|
||||
; RV32-NEXT: sw a2, 12(a0)
|
||||
; RV32-NEXT: lw a2, 8(a1)
|
||||
; RV32-NEXT: sw a2, 8(a0)
|
||||
; RV32-NEXT: lw a2, 4(a1)
|
||||
; RV32-NEXT: sw a2, 4(a0)
|
||||
; RV32-NEXT: lw a1, 0(a1)
|
||||
; RV32-NEXT: sw a1, 0(a0)
|
||||
; RV32-NEXT: ret
|
||||
;
|
||||
; RV64ALIGNED-LABEL: t7:
|
||||
; RV64ALIGNED: # %bb.0: # %entry
|
||||
; RV64ALIGNED-NEXT: lw a2, 12(a1)
|
||||
; RV64ALIGNED-NEXT: sw a2, 12(a0)
|
||||
; RV64ALIGNED-NEXT: lw a2, 8(a1)
|
||||
; RV64ALIGNED-NEXT: sw a2, 8(a0)
|
||||
; RV64ALIGNED-NEXT: lw a2, 4(a1)
|
||||
; RV64ALIGNED-NEXT: sw a2, 4(a0)
|
||||
; RV64ALIGNED-NEXT: lw a1, 0(a1)
|
||||
; RV64ALIGNED-NEXT: sw a1, 0(a0)
|
||||
; RV64ALIGNED-NEXT: ret
|
||||
;
|
||||
; RV64UNALIGNED-LABEL: t7:
|
||||
; RV64UNALIGNED: # %bb.0: # %entry
|
||||
; RV64UNALIGNED-NEXT: ld a2, 8(a1)
|
||||
; RV64UNALIGNED-NEXT: sd a2, 8(a0)
|
||||
; RV64UNALIGNED-NEXT: ld a1, 0(a1)
|
||||
; RV64UNALIGNED-NEXT: sd a1, 0(a0)
|
||||
; RV64UNALIGNED-NEXT: ret
|
||||
entry:
|
||||
%0 = bitcast %struct.Foo* %a to i8*
|
||||
%1 = bitcast %struct.Foo* %b to i8*
|
||||
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %0, i8* align 4 %1, i32 16, i1 false)
|
||||
ret void
|
||||
}
|
||||
|
||||
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) nounwind
|
||||
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
|
||||
Loading…
Reference in New Issue